FPGA Design

HCL Technologies Limited; Hyderabad, Chennai, Bengaluru; Vor Ort; INR 1.800.000 - 4.000.000; Vollzeit

Zusammenfassung

HCL Technologies Limited is seeking an experienced FPGA Lead to drive complex digital FPGA projects across RTL design, IP/SOC integration, and board bring-up. The role requires hands-on Verilog/SystemVerilog expertise and a track record of successful FPGA bring-up and debugging. You will work on interfacing DDR3, UART, Ethernet IP, and clock/ADC subsystems in a fast-paced engineering team.

Immediate or short-notice availability preferred. Location: Chennai / Bangalore / Hyderabad.

Qualifikationen

• 5–15 years of FPGA design and RTL experience
• Proficiency in Verilog/SystemVerilog for design and verification
• Experience with FPGA bring-up, synthesis, and IP integration
• Board-level and RTL debugging expertise

Aufgaben

• Leading FPGA design and development for complex digital logic
• RTL design, IP/SOC integration, wrapper generation, synthesis
• FPGA board bring-up, debugging, and bit/jic file generation
• Integration of multiple interfaces and firmware into a unified programming flow
• Soft OS, DDR3, UART, Ethernet IP integration
• Clock generation, ADC parallel interface debugging & testing

Kenntnisse

Verilog

SystemVerilog

FPGA design & verification

FPGA bring-up & debugging

Tools

Quartus

Eclipse

Jobbeschreibung

Are you passionate about FPGA design, RTL development, and building nextgeneration digital systems?
Were looking for a talented and driven professional to join our growing engineering team!

Role: FPGA Lead
Experience: 5 to 15 years
Work Location: Chennai / Bangalore/Hyderabad
Availability: Immediate or within short notice (preferred)

What You’ll Work On

• Leading FPGA design and development for complex digital logic
• RTL design, IP/SOC integration, wrapper generation, synthesis
• FPGA board bring-up, debugging, and bit/jic file generation
• Integration of multiple interfaces and firmware into a unified programming flow
• Soft OS, DDR3, UART, Ethernet IP integration
• Clock generation, ADC parallel interface debugging & testing

Skills & Expertise

• Hands-on experience with Intel Altera Quartus and Eclipse
• Strong in Verilog and SystemVerilog (design + verification)
• Experience with FPGA bring-up, synthesis, and IP integration
• Debugging expertise in board-level and RTL-level challenges

If you’re looking to take the lead on exciting FPGA projects and work with a dynamic engineering team, we’d love to hear from you!