FPGA Design Engineer

ACL Digital; Hyderabad; On-site; INR 1,500,000 - 2,500,000; Full time

Benefits offered by this job

Cutting-edge FPGA designs

Competitive compensation

Job summary

A technology consulting company in Hyderabad is looking for a Lead FPGA Design Engineer to lead design and validation of complex FPGA systems. The ideal candidate will mentor junior engineers and collaborate with cross-functional teams. A Bachelor's or Master's degree in Engineering and 6+ years of FPGA design experience are required. The role includes competitive compensation and opportunities for leadership.

Qualifications

• 6+ years of industry experience in FPGA design and verification.
• Expertise in VHDL/Verilog/SystemVerilog coding and simulation.
• Strong knowledge of high-speed interfaces (e.g., PCIe, DDR, Ethernet, AXI).

Responsibilities

• Lead architecture definition and design of complex FPGA solutions.
• Translate system-level requirements into FPGA design specifications.
• Integrate and validate FPGA designs on hardware.

Skills

VHDL/Verilog/SystemVerilog coding

FPGA design and verification

Testbench development

Scripting (Tcl, Python, Shell)

Leadership

Problem-solving

Communication skills

Education

Bachelor’s or Master’s degree in Electronics/Electrical/Computer Engineering

Tools

Xilinx Vivado

Intel Quartus

ModelSim

Questa

VCS

Job description

Overview

We are looking for a highly skilled and experienced Lead FPGA Design Engineer to join our hardware design team. The ideal candidate will lead the design, implementation, verification, and validation of FPGA-based systems for complex hardware products. This role involves mentoring junior engineers, collaborating with cross-functional teams, and ensuring delivery of high-performance, high-reliability designs.

Key Responsibilities

• Lead architecture definition and design of complex FPGA solutions using VHDL/Verilog/SystemVerilog.
• Translate system-level requirements into FPGA design specifications.
• Hands-on implementation of FPGA designs using Xilinx, Intel (Altera), or Lattice FPGAs.
• Develop testbenches and perform simulation using tools like ModelSim, Questa, or VCS.
• Integrate and validate FPGA designs on hardware, working closely with board design and software teams.
• Use industry-standard tools such as Vivado, Quartus, Synplify, etc.
• Lead FPGA timing closure, floor planning, and resource optimization.
• Perform version control, documentation, and design reviews.
• Guide and mentor a team of junior engineers; ensure design best practices and quality processes are followed.

Required Skills and Experience

• Bachelor’s or Master’s degree in Electronics/Electrical/Computer Engineering.
• 6+ years of industry experience in FPGA design and verification.
• Expertise in VHDL/Verilog/SystemVerilog coding and simulation.
• Experience with FPGA toolchains such as Xilinx Vivado, Intel Quartus, Synplify.
• Strong knowledge of high-speed interfaces (e.g., PCIe, DDR, Ethernet, AXI).
• Familiar with embedded processor systems (MicroBlaze, Nios II, ARM SoCs).
• Proficiency in scripting (Tcl, Python, Shell) for automation.
• Experience with static timing analysis, constraints definition (SDC), and debugging.
• Good understanding of hardware/software integration.
• Excellent leadership, problem-solving, and communication skills.

Preferred Qualifications

• Prior experience in leading FPGA teams or projects.
• Exposure to safety-critical or mission-critical design environments (e.g., automotive, aerospace, medical).
• Experience with hardware emulation or ASIC prototyping on FPGAs.
• Familiarity with version control systems (Git, SVN) and documentation tools.

Why Join Us?

• Work on cutting-edge FPGA designs in a collaborative environment.
• Competitive compensation with leadership opportunities.

Job Details

• Seniority level: Mid-Senior level
• Employment type: Full-time
• Job function: Engineering, Product Management, and Project Management
• Industries: Semiconductor Manufacturing and Engineering Services

How to Apply

Interested can share CV to [e-mail]