Lead Engineer - Design Verification ( Low Power / UPF)

Silicon Labs; Hyderabad; On-site; INR 1,500,000 - 2,200,000; Full time

Benefits offered by this job

Equity Rewards (RSUs)

Insurance plans with Outpatient cover

National Pension Scheme (NPS)

Flexible work policy

Childcare support

Job summary

Silicon Labs is seeking a Lead Engineer for Design Verification in Hyderabad. This role involves working on low-power design verification to ensure silicon is robust and efficient. You will validate power intent and drive coverage closure while collaborating closely with various teams.

The ideal candidate has a BS/MS in Electrical or Computer Engineering and 6–8 years of experience, with strong skills in SystemVerilog/UVM. The position offers benefits like equity rewards, flexible work policy, and childcare support.

Qualifications

• 6–8 years of experience in design verification.
• Experience with assertion-based and coverage-driven verification.
• Knowledge of low-power SoC constructs.

Responsibilities

• Develop and execute test plans for low-power modes and states.
• Ensure robust and power-efficient silicon.
• Collaborate with cross-functional teams.

Skills

SystemVerilog/UVM skills

Understanding of low-power design techniques

Debugging and problem-solving skills

Scripting skills (Python/Perl)

Education

BS/MS in Electrical or Computer Engineering

Tools

Synopsys NLP tools

ASIC tools and flows

Job description

## Lead Engineer - Design Verification ( Low Power / UPF)Applylocations: Hyderabadtime type: Full timeposted on: Posted Yesterdayjob requisition id: 20699Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.## The Role :In this role, you will work on low-power design verification for complex SoCs, ensuring robust and power-efficient silicon. You will focus on validating power intent and low-power features using UPF/CPF methodologies across the design lifecycle.## Meet the Team :The Design Verification team collaborates closely with RTL, architecture, and physical design teams to deliver high-quality silicon. We focus on coverage-driven verification and advanced low-power methodologies.## Responsibilities :* Understand and verify power domains and power intent (UPF/CPF)* Develop and execute test plans for low-power modes and states* Own end-to-end DV: testbench development, testcases, assertions, debugging (RTL/UPF)* Drive functional and assertion coverage closure* Build and enhance SystemVerilog/UVM verification environments* Perform power-aware verification and debug complex issues* Collaborate with cross-functional teams and explore advanced DV methodologies## Requirement :### Minimum Qualifications:* BS/MS in Electrical or Computer Engineering (or related field)* 6–8 years of experience in design verification* Strong SystemVerilog/UVM skills* Experience with assertion-based and coverage-driven verification* Solid understanding of low-power design techniques* Experience with UPF/CPF-based verification* Knowledge of low-power SoC constructs (clock gating, isolation, level shifters, retention)* Strong debugging and problem-solving skills### Nice to Have:* Experience with formal/static verification* Familiarity with Synopsys NLP tools* Knowledge of GLS / PA-GLS* Scripting skills (Python/Perl)* Experience with ASIC tools and flows## Why Join Silicon Labs :* Work on cutting-edge low-power SoC designs* Solve complex challenges in power-aware verification* Collaborate across design and verification teams* Grow your expertise in advanced DV methodologies"**Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making"****Benefits & Perks :**Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.* Equity Rewards (RSUs)* Insurance plans with Outpatient cover* National Pension Scheme (NPS)* Flexible work policy* Childcare support*Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.*