Layout Engineer, DPG IP DEV Layout

Micron Technology; Bengaluru; On-site; INR 1,500,000 - 2,300,000; Full time

Job summary

Micron Technology Bengaluru, India, is seeking a Layout Design Engineer to join the DPG-IPDEV team. You will work on analog and mixed-signal IPs used in modern DRAM, collaborating across Micron's global teams to deliver block layouts and full-chip integration for AI and HPC applications.

The role requires 3–5 years in analog layout, proficiency with Cadence VLE/VXL and Mentor Calibre, and strong communication. BE or MTech in Electronic/VLSI is expected.

Qualifications

• 3–5 years' experience in analog/custom layout design.
• Proficiency with Cadence VLE/VXL and Mentor Calibre DRC/LVS.
• Hands-on experience laying out critical blocks (PLL, ADC, DAC, LDO, Bandgap etc.).
• Solid understanding of analog layout fundamentals and parasitics.
• Excellent verbal and written communication skills.

Responsibilities

• Design and development of analog, mixed-signal, and digital blocks and full chip integration support.
• Perform LVS/DRC/antenna checks and document results.
• Ensure on-time delivery of block-level layouts with quality.
• Plan, estimate effort, and coordinate across projects.
• Collaborate with global teams to drive layout success.

Skills

Analog Layout

Layout verification

Communication skills

Education

BE/MTech in Electronic/VLSI Engineering

Tools

Cadence VLE/VXL

Mentor Calibre DRC/LVS

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Job Description

For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

We are looking for Layout Design engineer at our Micron Technology’s DPG-IPDEV Team in Bangalore, India. DPG-IPDEV team is responsible for developing world-class analog and mixed signal IPs used in every modern DRAM chip produced in Micron. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment.

Role and Responsibilities

• Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.
• Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.
• Responsible for on-time delivery of block-level layouts with acceptable quality.
• Demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environment.
• Contribute to effective project-management.
• Effectively communicating with Global engineering teams to assure the success of layout project.

Qualification/Requirements

• 3 to 5 years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET )
• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
• Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Good understanding of Analog Layout fundamentals (e.cg., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive static device parasitics etc.)
• Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
• Ability to understand design constraints and implement high-quality layouts
• Ability to understand design hierarchy and different architectures for Memory designs.
• Excellent problem-solving skills in physical verification of custom layout.
• Multiple Tape out support experience will be an added advantage.
• Excellent verbal and written communication skills.
• Should be proactive in exploring AI-related tools in day-to-day tasks.

Education

BE or MTech in Electronic/VLSI Engineering

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.