IC Verification Engineer

Broadcom; Bengaluru; On-site; INR 3,000,000 - 5,000,000; Full time

Job summary

Broadcom in Bengaluru, India, is seeking an experienced verification engineer to design and implement test plans for Block/Core/SOC features, develop scalable test benches, and drive functional coverage. The role requires deep expertise in SystemVerilog, UVM/VMM/OVM, and object-oriented programming, with hands-on work on complex protocols like PCIe and strong ability to deliver independently.

You will lead verification strategy, build pseudo-random tests, and collaborate with design teams to

Qualifications

• 8+ years overall experience in verification for complex SoC/Block/cores.
• Deep knowledge of testbench construction, test plans and coverage.
• Strong object-oriented programming fundamentals.

Responsibilities

• Develop test plans for Block/Core/SOC features and write functional coverage.
• Architect scalable, reusable test benches and verification environments.
• Create pseudo-random tests to achieve full functional coverage.
• Debug regressions, analyze coverage gaps, and improve tests.
• Lead verification strategy documentation and design reviews.
• Drive quality and efficiency improvements in verification.

Skills

SystemVerilog

Verification methodologies (UVM/VMM/OV

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Job description

Job duties

• Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Architect and develop scalable and re-usable test benches, using the framework of the verification methodology
• Build pseudo-random tests to verify and get full Functional coverage
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
• Drive improvements in Verification in terms of quality and efficiency.

Requirements

• Bachelor's degree in Electrical Engineering or related degree with 8+ years relevant experience or Master's degree in Electrical Engineering or related degree with 6+ years related experience
• 6+ years of experience in writing and debugging complex test benches
• Must have deep understanding of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
• Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
• Should have exceptionally good command of Object-Oriented Programming principles.
• A good understanding of a complex protocol like PCIe or other multi-layered protocol
• Capability to work independently and deliver.
• Knowledge of PCI Express protocol is desired