FPGA IP Software Development Engineer

Altera Corporation; India; On-site; INR 450,000 - 750,000; Full time

Job summary

Altera Corporation seeks an experienced Engineer to drive the architecture, development, and implementation of FPGA Soft IP solutions. You will own the end-to-end lifecycle from micro-architecture to timing closure, RTL coding, simulation, and hardware validation.

You will work closely with embedded software, hardware, and systems teams to deliver robust, high-performance FPGA Soft IPs, with an emphasis on toolchain flow, verification, and cross-functional collaboration for seamless system

Qualifications

• 7+ years of dedicated RTL experience writing production-grade RTL using SystemVerilog, Verilog or VHDL.
• Hands-on proficiency with FPGA toolchains (Quartus Prime, Vivado, Libero).
• Experience in timing closure, CDC, and constraint troubleshooting.

Responsibilities

• Define micro-architecture and implement RTL code for FPGA Soft IP.
• Drive FPGA tool flow: synthesis, place-and-route, constraints, STA.
• Resolve multi-clock timing issues and CDC anomalies for robust operation.
• Develop testbenches and run simulations to validate logic before hardware bring-up.
• Validate RTL on evaluation boards using lab equipment and debugging tools.
• Collaborate across software, hardware, and systems teams for interfaces and integrations.

Skills

RTL Architecture

SystemVerilog

Verilog

VHDL

Timing closure

Linting / static verification

Scripting (Python/Tcl)

Toolchain expertise (Quartus Prime / X

Education

Bachelor's or Master's in Electronics / VLSI

Tools

Quartus Prime

Vivado

Libero

Job description

Job Details: Job Description: Job Description

We are seeking a highly skilled and motivated Engineer to drive the architecture, development, and implementation of our Soft IP solutions. In this role, you will own the end-to-end FPGA Soft IP development lifecycle - micro-architecture definition and RTL coding to timing closure, simulation, and physical hardware validation. You will work closely with embedded software, hardware, and systems engineering teams to deliver robust, high-performance FPGA Soft IP solution solutions.

Key Responsibilities

• RTL Architecture & Coding: Define micro-architecture and implement clean, efficient, and reusable RTL code using System Verilog, Verilog, or VHDL.
• IP Integration & Flow Management: Drive the full FPGA tool flow including synthesis, place-and-route (P&R), constraints creation, and static timing analysis (STA).
• Timing Closure: Resolve complex multi-clock designs, Clock Domain Crossing (CDC) anomalies, and timing violations to ensure robust operation.
• Verification & Simulation: Develop testbenches and run block-level behavioral simulations to thoroughly debug and validate logic functionality before target implementation.
• Hardware Bring-up & Debug: Validate RTL functionality on actual evaluation boards using lab equipment like logic analyzers, oscilloscopes, and protocol compliance testers.
• Cross-functional Collaboration: Collaborate with software and board-level hardware teams to establish specifications, interface architectures, and system integration paths.

Qualifications

• Education: Bachelor's or master's degree in Electronics Engineering, Electrical Engineering, VLSI, Embedded Systems, or a closely related technical discipline.
• Hardware Description: 7+ years of dedicated experience writing production-grade RTL using System Verilog, Verilog, or VHDL.
• Toolchain Expertise: Hands-on proficiency with major FPGA vendor suites like Altera Quartus Prime, AMD / Xilinx Vivado or Microchip Libero.
• Analysis & Linting: Strong familiarity with static verification methodologies including Linting, CDC validation, and constraint troubleshooting.
• Scripting Skills: Ability to automate tool workflows using Tcl, Python, or Shell scripting.

Preferred / Bonus Skills

• Familiarity with embedded SoC architectures (e.g., ARM Cortex, RISC-V) and hardware-software co-design.

Job Type: Regular Shift: Shift 1 (India) Primary Location: Bengaluru, Karnataka, India Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

About Altera

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.