Emulation Engineer

MosChip Technologies Limited; Hyderabad; Sur place; INR 1 800 000 - 2 700 000; Plein temps

Résumé du poste

MosChip Technologies Limited in Hyderabad is seeking an Emulation Engineer to drive validation strategy for high-performance computing ASIC designs. You will define pre- and post-silicon test plans and collaborate with design, verification, validation and software teams to ensure robust emulation solutions.

The role requires strong hands-on knowledge of emulation tooling (Palladium, Protium, Veloce, Zebu), SystemC/C/C++, UVM/SV, SystemVerilog, and experience building HDL-HVL co-emulation tests.

Qualifications

• Qualification: Bachelors or Masters in Electronics and Communication Engineering or equivalent.
• Experience with emulation technologies and verification flows.
• Knowledge of HDL-HVL co-emulation and build/compile processes.
• Exposure to PCIe, CXL, DDR, Flash, Memory, USB and CPU domains.

Responsabilités

• Define the validation strategy and sign-off for HPC ASIC designs.
• Develop pre- and post-silicon test plans with cross-functional teams.
• Work with design, verification, validation and software groups to meet emulation needs.
• Architect emulation systems for IP, SOC and multi-chip designs.
• Build images from scratch and adapt designs to emulation environments.
• Debug, bring-up and issue reproduction on emulators; ensure performance-debug balance.

Connaissances

Emulation

SystemC/C++

UVM/SV verification

SystemVerilog

C++ modelling

Co-emulation

Python scripting

TCL scripting

Cross-functional collaboration

Debugging

Formation

Bachelors or Masters in Electronics and Communication Engineering

Outils

Palladium

Protium

Veloce

Zebu

Description du poste

Qualification: Bachelors or Masters (Electronics and Communication Engineering or equivalent)

Job Description:

As an Emulation Engineer, you'll be an integral part of a dynamic team dedicated to creating cutting-edge ASIC solutions for High-Performance Computing (HPC) systems. Your role will involve defining the validation strategy leading to functional sign-off for these high-performance computing designs.

Key functions and responsibilities:

• Proficient in various emulation technologies, including simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods.
• Familiarity with tools such as Palladium, Protium, Veloce, or Zebu.
• Good Knowledge of SystemC/C/C++ and UVM/SV verification languages
• Experience with SystemVerilog and C++ for modelling RTL components and transactors.
• Ability to develop C/C++/SystemC/SV tests in HDL-HVL (Hardware Description Language-Hardware Verification Language) Co-emulation platforms.
• Understanding of compilation and build flow.
• Skilled at building images from scratch, making necessary design modifications to adapt to emulation.
• Work closely with verification teams to define and implement comprehensive pre and post silicon test plans.
• Interface effectively with design, verification, validation, and software development teams to understand their needs from an emulation perspective.
• Experience in architecting emulation systems for various design scales (IP blocks, SOC, multi-chip systems).
• Balancing performance and ease of debug.
• Proficient in post-silicon bring-up, debugging, and issue reproduction on emulators.
• Familiarity with Python and TCL scripting languages.
• Exposure to domains such as PCIe, CXL, DDR, Flash, Memory, USB, and CPU.
• Strong communication and collaboration skills to work effectively with cross-functional teams and domain experts.
• Successfully manage multiple design releases and provide support for debugging customer issues.