EDA Tools Hardware Engineer

Intel; Bengaluru; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

Intel in Bengaluru seeks an experienced CAD/EDA software engineer to design, develop, and support automation for testchip development across advanced nodes. You will enable CAD environments, data workflows, and tool integration to accelerate silicon readiness.

You will collaborate with design, process, and reliability teams, maintain automation frameworks using SKILL, Python, and TCL/PERL, and contribute to VLSI concepts and optimization in a hybrid India-based role.

Qualifications

• Bachelor's or master's in Electronics, CS or related field.
• 3–10 years in CAD software development, VLSI, or design enablement.
• Proficiency in SKILL, Python, and TCL/PERL.

Responsibilities

• Designs, develops, and supports custom design infrastructure and automation for testchip development.
• Develops automation frameworks using SKILL, Python, and scripting for layout and data migration.
• Enables CAD environments, version-control, and database infrastructures.
• Collaborates with design, process, technology development, reliability and validation teams to deliver scalable methodologies for full-chip integration, DRC/LVS verification, tape-in readiness, and silicon characterization.

Skills

CAD software development

Python

TCL/PERL

VLSI concepts

Data structures

Version control

Education

Bachelor's / Master's in Electronics or CS

Tools

Cadence

Synopsys

Job description

Job Details

Job Description

Designs, develops, and supports custom design infrastructure, EDA methodologies, and automation solutions for semiconductor testchip development across advanced technology nodes. Drives end-to-end enablement of testchip integration, custom layout design, E-Test structures, design libraries, and verification flows to accelerate process technology development and silicon readiness. Develops and maintains automation frameworks using SKILL, Python, and scripting languages for layout generation, library management, data migration, and design-flow optimization. Enables and validates CAD environments, version-control systems, and database infrastructures. Collaborates with design, process, technology development, reliability and validation teams to deliver scalable methodologies for full-chip integration, DRC/LVS verification, tape-in readiness, and silicon characterization.

Qualifications

• Bachelor's / Master's degree in Electronics Engineering, Computer Science, or a related field.
• 3-10 years of experience in CAD software development, VLSI, or Design Enablement.
• Proficiency in SKILL, Python, and TCL/PERL programming.
• Knowledge of VLSI concepts and EDA tools (Cadence/Synopsys).
• Knowledge of Custom layout
• Knowledge of Data Structures, Algorithms, and software optimization.
• Strong problem-solving, teamwork, and communication skills.
• Familiarity with software development practices including version control, testing, and quality assurance

Preferred Qualifications

• Exposure to C/C++ or other object oriented programming languages.
• Knowledge P-cell development and Testchip integration.
• Exposure to implementation of AI based applications in EDA tools.

Job Type

Experienced Hire

Shift

Shift 1 (India)

Primary Location

India, Bangalore

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.