Display Synthesis Engineer, Senior

Qualcomm; Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Qualcomm India Private Limited is seeking a technically strong leader for the Display Sub-System implementation domain. You will guide a high-performing team through complex physical synthesis, timing closure, and low-power constraints across multiple clock domains.

Bachelor’s or Master’s in engineering with 5+ years of hardware experience and familiarity with industry tools are required, with collaboration across design, DFT, and PD teams to ensure timely, high-quality netlist delivery.

Qualifications

• Bachelor’s or master’s degree in engineering with 5+ years of experience.
• Strong knowledge of physical synthesis and synthesis methodologies.
• Experience writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization.
• Experience in all aspects of timing closure for multi-clock domain designs.
• Should be familiar with MCMM synthesis and optimization.
• Should have good understanding of low-power design implementation using UPF.
• Experience with scripting language such as Perl/ Python, TCL.
• Experience with different power optimization flows or technique such as clock gating.
• Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation
• Should be able to handle ECOs and formal verification and maintain high quality matrix.

Responsibilities

• Develop signoff quality constraints and power intent constraints.
• Run RTL Lint, CLP, MEMBIST, DFT DRC as needed.
• Create TCL scripts and analyze/debug designs.
• Work hands-on with Synopsys DCG/Genus/Fusion Compiler.
• Hands-on with PrimeTime for constraint development across multi-clock domains.
• Use Cadence Conformal LEC and Conformal Low Power including UPF development.
• Collaborate with PD/DFT teams for netlist delivery and timing checks.
• Mentor and grow a high-performing engineering team.
• Communicate with stakeholders across the organization.
• Focus on improving execution efficiency and optimizations in area, power and performance.

Skills

Synthesis

LEC

Low Power

Memory BIST

Constraints validation

Signoff constraints

Power intent

RTL Lint

DFT DRC

TCL scripting

DCG

Genus

PrimeTime

UPF development

Conformal LEC

Conformal Low Power

Education

Bachelor's degree in CS/EE/Engineering

Master's degree in CS/EE/Engineering

PhD in CS/EE/Engineering

Tools

Perl

Python

TCL

Cadence Conformal

UPF tooling

Job description

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

Responsibilities

• 3+ years Experience
• Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation.
• Development of signoff quality constraints and the development of power intent constraints.
• May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc.
• TCL script development in addition to running/analyzing/debugging designs.
• Hands on with Synopsys DCG/Genus/Fusion Compiler.
• Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains.
• Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development
• Experience with either RTL development or Physical Design is also a plus

Additional Job Description

• Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System.
• Able to handle multiple project execution that are time critical and complex
• Able to communicate effectively with all stakeholders across the organization
• Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution
• Focus on improving execution efficiency and improve on the optimizations in area, power and performance.
• Able to grow the team in terms of technical depth and size as we do more and more projects
• Able to innovate and bring fresh ideas
• Bachelor’s or master’s degree in engineering with 5+ Years of experience.
• Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.
• Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.
• Experience in all aspects of timing closure for multi-clock domain designs.
• Should be familiar with MCMM synthesis and optimization.
• Should have good understanding of low-power design implementation using UPF.
• Experience with scripting language such as Perl/ Python, TCL.
• Experience with different power optimization flows or technique such as clock gating.
• Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation
• Should be able to handle ECOs and formal verification and maintain high quality matrix

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Equal Opportunity Employer

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Company Policies

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.