CPU DFT Manager

Intel Corporation; Bengaluru; Híbrido; INR 3.500.000 - 7.000.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Hybrid work model

Descripción de la vacante

Intel Corporation in Bengaluru is seeking an experienced DFT Lead to guide a high-performing team responsible for X86 CPU DFT design and validation. You will craft execution plans, drive verification using RTL simulations, and collaborate with post-silicon teams to resolve issues.

The role requires deep DFT expertise, hands-on JTAG/Memory BIST/Memory Repair, and strong leadership for cross-site coordination. This is a hybrid position within Intel's SPE group.

Formación

• 10+ years of experience in DFT domain at IP or SoC level.
• 5+ years of experience managing and leading teams.
• Strong knowledge and experience in Spyglass DFT.
• Hands-on skills in implementing JTAG, Memory BIST and Memory Repair (BIRA/BISR).
• Expertise in DFT Design and verification using RTL simulations and emulation.

Responsabilidades

• Manage and technically guide a high-performing DFT team focused on X86 CPU DFT design and validation.
• Develop detailed execution plans for parallel activities across multiple projects and ensure timely, high-quality delivery.
• Implement JTAG, Memory BIST, and Memory Repair (BIRA/BISR) circuitry using industry-standard tools.
• Drive DFT verification for features such as scan, arrays, and DFD using RTL simulations and emulation.
• Create plans and tests for validating portions of complex microarchitecture using written specs, RTL code, and other test guides.
• Debug failures to root cause and learn architecture/microarchitecture deeply.
• Collaborate with post-silicon/manufacturing teams on ATE, debugging and resolving issues.
• Work closely with global stakeholders to address DFT challenges and improve product quality.
• Ensure alignment of timelines and deliverables across sites.

Conocimientos

DFT experience

Team leadership

Spyglass DFT

JTAG / Memory BIST / BIRA

RTL simulations

Timing analysis

RTL scripting

Post-silicon collaboration

X86 CPU architecture

Process node awareness

Descripción del empleo

Job Description:

Key Responsibilities:

• Manage and technically guide a high-performing DFT team focused on X86 CPU DFT design and validation.
• Develop detailed execution plans for parallel activities across multiple projects and ensure timely, high-quality delivery.
• Implement JTAG, Memory BIST, and Memory Repair (BIRA/BISR) circuitry using industry-standard tools.
• Drive DFT verification for features such as scan, arrays, and DFD using RTL simulations and emulation.
• Create plans and tests for validating portions of complex microarchitecture using written specs, RTL code, and other test guides.
• Debug failures to root cause and learn architecture/microarchitecture deeply.
• Collaborate with post-silicon/manufacturing teams on ATE, debugging and resolving issues.
• Work closely with global stakeholders to address DFT challenges and improve product quality.
• Ensure alignment of timelines and deliverables across sites.

Qualifications:

• 10+ years of experience in DFT domain at IP or SoC level.
• 5+ years of experience managing and leading teams.
• Strong knowledge and experience in Spyglass DFT.
• Hands‑on skills in implementing JTAG, Memory BIST and Memory Repair (BIRA/BISR) circuitry.
• Expertise in DFT Design and verification using RTL simulations and emulation.
• Good understanding of timing constraints and DFT mode timing analysis.
• Proficiency in RTL coding and shell scripting.
• Experience working with post‑silicon/manufacturing teams on ATE, including debugging and issue resolution.
• Experience with X86 CPU architecture and microarchitecture.
• Familiarity with advanced process nodes and hierarchical DFT strategies.
• Strong communication and leadership skills for cross‑site collaboration.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.