Automated Test equipment Test V93K;T2K;J500;UFLEX

HCLTech

Bengaluru

On-site

INR 600,000 - 1,200,000

Full time

14 days+

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Job summary

HCLTech Silicon Engineering is conducting a walk‑in drive for ATE Test Engineers with hands‑on experience in bench characterization, PCB board testing, SLT testing, and ATE platforms. The event takes place in Bangalore on 25 July 2026 from 9:00 AM to 4:00 PM. Immediate joiners or those with short notice are preferred.

Email your profile to Magenderan.r@hcltech.com. Ideal candidates will have 3–8 years of relevant experience and familiarity with Chroma or equivalent ATE platforms, along with

Qualifications

  • Experience 3 to 8 years in ATE testing and semiconductor bench characterization.
  • Walk‑in interview format with details for Bangalore on 25 July 2026, 9:00 AM to 4:00 PM.
  • Immediate joiners preferred or candidates with less than 30 days notice.

Responsibilities

Skills

Bench Characterization
Silicon Validation
PCB Board Testing
Hardware Debugging
Yield Analysis
Production Test Support
ATE Platform (Chroma)

Job description

Position Details

Walk‑In Drive | ATE Test Engineers | Bangalore | 25th July 2026

HCLTech Silicon Engineering is hiring talented ATE Engineers with hands‑on experience in Bench Characterization, PCB Board Testing, SLT Testing, and ATE platforms for our Semiconductor Practice.

Walk-In Date: 25th July 2026

Time: 9:00 AM to 4:00 PM

Experience: 3 to 8 Years

Notice Period: Immediate Joiners / Candidates with Less than 30 Days Notice Period preferred

Email your profile to Magenderan.r@hcltech.com

Key Skills Required
  • Bench Characterization & Silicon Validation
  • PCB Board Testing & Hardware Debugging
  • Yield Analysis & Production Test Support
  • Experience with any ATE Platform: Chroma or equivalent
Preferred Qualifications
  • Strong debugging and problem-solving skills
  • Experience with lab instruments such as Oscilloscope, Logic Analyzer, DMM, Power Supplies
  • Exposure to Python, Perl, or TCL scripting is a plus
  • Good understanding of semiconductor test and validation flows
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