ASIC VERIFICATION ENGINEER

Broadcom Inc.; Bengaluru; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Broadcom Inc. in Bengaluru is seeking a senior verification engineer to contribute to AI Network Infrastructure workloads.

You will develop and maintain verification environments using SystemVerilog/UVM, work with Arch/uArch/Design teams to craft and close feature sets, and drive coverage closures and end-to-end verification. The role emphasizes high-speed protocols such as PCIe and Ethernet, with hardware/software co-simulation expertise expected.

Qualifications

• 8+ years of verification experience on chip-level SoC.
• TO BE CONTEXTUAL
• Experience with End-to-End specs and network/system topology.
• Exposure to GLS, Coverage Driven Methodology, and ATE is a plus.

Responsibilities

• Develop and maintain verification environment in a mix of SV/UVM.

Skills

SystemVerilog/UVM

SoC verification

HW/SW co-simulation

VCS/Verdi/Jasper

Python/Perl

Test bench acceleration/Emulation

Education

BS/MS/PhD in Electrical Engineering

Tools

VCS

Verdi

Jasper

UVM

Job description

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job.2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Job DescriptionWhat You can Expect -- Work on Latest cutting edge CSG Switches.- To be part of the team working on defining many Firsts for the AI Network Infrastructure Ecosystem.- Develop and maintain verification Environment in Mix of SV/UVM.- Understanding of the End to End spec along with Network & System topology.- Closely working with Arch/uArch/Design team for Test Plan development and closure of the feature set across Blocks/Top level.- Coverage Closures, Gate Level Simulations along with end to end verification cycle.What we are looking for -- Bachelor's/Masters/PhD with Verification experience of 8+ years- Wide exposure to chip level (SoC) verification and SystemVerilog/UVM methodology a MUST- Exposure to any one of the scripting languages - Perl or Python or SED/Awk- Expertise in Co-Simulations (HW/SW) Flow and debugs- Knowledge of networking protocols(L2/L3/L4, 1588TS, UEC) desired but not necessary.- Expertise in the High Speed bus protocols desired - PCIe, Ethernet, AXI4.0- Exposure the Chip level Interconnect/Testability Functions - JTAG, I2C, PLLs etc- Experience in GLS, Coverage Driven Methodology, ATE- Good exposure in Simulation tool usage for simulation (VCS) and waveform debug(Verdi) and formal tools like Jasper.- Exposure to Test Bench Accelerators /Emulation Platforms.Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.