ASIC Design Verification Lead

Advanced Micro Devices, Inc.; Osman Nagar; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

AMD in India seeks a Senior Staff Silicon Design Verification Engineer to lead verification across high-speed memory controller IPs (DDR5/LPDDR6/HBM4) and NoC. You will architect verification environments and drive pre-silicon strategies with cross-functional teams.

The role requires guiding verification plans, testbenches, and collaboration with design and software teams, using UVM, formal methods, and assertion-based verification. Senior leadership skills are essential.

Qualifications

• BS with 8+ years of experience or MS with 6+ years or PhD with 3+ years in Electrical Engineering, Computer Engineering, or Computer Science.
• Experience leading verification teams of 5+ engineers.
• Experience with UVM, SystemVerilog test benches, and simulation/debug tools.

Responsibilities

• Lead verification of high-speed Crypto, NoC, and DRAM memory controller designs.
• Architect and develop IP- and SoC-level verification environments.
• Manage verification teams planning, execution, tracking, and delivery to programs.
• Develop verification plans with testbenches and test cases.
• Collaborate with design/architecture/software to define verification strategies.
• Utilize UVM, formal verification, and assertion-based verification.
• Mentor junior engineers and foster a collaborative team environment.

Skills

Leadership

Communication

Team management

Verification strategies

Education

BS in EE/CE/CS

MS in EE/CE/CS

PhD in related field

Tools

Synopsys VCS

Cadence Xcelium

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

ASIC DESIGN VERIFICATION LEAD

THE ROLE:

Adaptive and Embedded Computing Group (AECG) seeks a Senior Staff Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of cutting-edge DRAM Memory Controller IPs (DDR5, LPDDR6, HBM4), high-speed Crypto, and Network-on-Chip (NoC). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success.

THE PERSON:

The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre-Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality.

Key Responsibilities:

• Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (DDR5, LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
• Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
• Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
• Develop and execute comprehensive verification plans, including testbenches and test cases.
• Collaborate with design, architecture, and software teams to define and implement verification strategies.
• Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
• Mentor and guide junior engineers, fostering a collaborative and innovative team environment.

PREFERRED EXPERIENCE:

• Require hands on experience with verification of state-of-the-art memory controllers such as DDR, LPDDR, and HBM. Requires strong understanding of current memory controller protocols and calibration (DDR3/4/5, LPDDR4/5/6, HBM2/3/4), board skew and jitter modeling.
• Require proven track record in technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs.
• Require experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS orCadence Xcelium.
• Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs is a plus.
• Require familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management.
• Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus.
• Experience with gate-level simulation, power‑aware verification is a plus.
• Experience with silicon debug at the tester and board level, is a plus.

ACADEMIC CREDENTIALS:

• Require BS w/ 8+ yrs or MS w/ 6+ yrs or PhD w/ 3+ yrs in Electrical Engineering, Computer Engineering, or Computer Science.

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Benefits offered are described: AMD benefits at a glance.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.