Senior Analog Circuit Design Engineer

ACL Digital; Bengaluru; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

ACL Digital in Bengaluru is seeking a Senior Analog Circuit Design Engineer to drive transistor-level design and optimization of analog and mixed-signal ICs.

You will own core IP blocks, oversee layout guidance, and coordinate with Digital, Verification, and System teams, ensuring top-level closure and robust silicon performance.

The role requires strong fundamentals, PD to characterize silicon, and hands-on verification across PVT conditions.

Qualifications

• B.Tech or M.Tech in Electronics and Electrical Engineering.
• Experience in analog and mixed-signal IC design.
• Transistor-level design and layout supervision.
• Experience with PVT verification and Monte Carlo analyses.
• Silicon validation and debugging support.

Responsibilities

• Design, simulate, and optimize analog/mixed-signal ICs at transistor level.
• Develop core blocks: LDOs, Bandgap refs, Op-amps, Comparators, ADCs/DACs, PLLs, Oscillators.
• Perform pre/post-layout verification across PVT corners and aging effects.
• Guide floorplanning, matching, and noise isolation with layout team.
• Collaborate with Digital, Verification, and System teams for design closure.
• Support post-silicon bring-up and bench characterization.

Skills

Analog circuit design

Mixed-signal ICs

Circuit simulation

LDO design

Bandgap references

Op-amps

ADCs/DACs

PLLs / Oscillators

Layout supervision

Cross-functional collaboration

Silicon validation

Education

B.Tech in Electronics & Electrical Engineering

M.Tech in Electronics & Electrical Engineering

Job description

Job Title:Senior Analog Circuit Design Engineer:

Location: Banglaore

Job Description:

. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute o

Key Responsibilities

• Circuit Design & Implementation: Design, simulate, and optimize complex analog and mixed-signal integrated circuits (ICs) at the transistor level.
• IP Blocks Ownership: Develop and own core building blocks such as [LDOs, Bandgap References (BGR), Op-Amps, Comparators, Charge Pumps, ADCs/DACs, PLLs, or Oscillators] based on company requirements.
• Simulation & Verification: Perform extensive pre-layout and post-layout verification across PVT (Process, Voltage, Temperature) corners, Monte Carlo analysis, and reliability flows (EMIR, aging, and electro-thermal effects).
• Layout Supervision: Work closely with physical layout engineers to guide floorplanning, matching strategies, parasitic minimization, and noise isolation techniques.
• Cross-Functional Collaboration: Partner with Digital Design, Verification, and System teams to ensure flawless top-level integration and mixed-signal design closure.
• Silicon Validation: Support post-silicon bring-up, bench characterization, and debugging activities to map silicon performance back to simulation models