Senior PDK Automation Layout Engineer

Analog Devices; Cork; On-site; EUR 90,000 - 130,000; Full time

Job summary

Analog Devices, Inc. in Limerick, Ireland, seeks an experienced PDK development engineer to join the Engineering Enablement team. You will develop, deliver and support PDK components across multiple processes for internal and external foundries.

You will build and maintain PDKs, implement DRC/LVS rule decks, create pcells with Cadence Skill, and automate layout generation and verification while collaborating with process development, integration and design teams.

Qualifications

• 4+ years experience in PDK development

Responsibilities

• Develop, maintain comprehensive PDKs that accurately represent semiconductor process technologies.
• Implement and maintain DRC/LVS/RC extraction rule decks using industry-standard EDA tools such as Cadence Pegasus, Siemens Calibre, or Synopsys ICV.
• Create and support parameterized layout cells (pcells) using Cadence Skill and related scripting languages.
• Develop automation scripts to streamline layout generation, verification, and design environment setup.
• Collaborate with process development, integration, and design teams to define and translate process parameters into physical design rules.
• Build and improve PDK QA flows and validation methodologies.
• Provide documentation and technical support to internal design teams and external PDK users.
• Ensure all deliverables meet foundry-defined design compliance rules (DRC/LVS).
• Work with EDA vendors, IP providers, and internal stakeholders to align PDK updates with technology roadmaps and customer needs.
• Contribute to the continuous enhancement of PDK infrastructure and layout automation frameworks.

Skills

PDK development

Programming / scripting

Python

TCL

Perl

Education

Bachelors or Masters in Electrical Engineering

Tools

Cadence Skill

Job description

Analog Devices, Inc. in Limerick, Ireland, seeks an experienced PDK development engineer to join the Engineering Enablement team. You will develop, deliver and support PDK components across multiple processes for internal and external foundries.

You will build and maintain PDKs, implement DRC/LVS rule decks, create pcells with Cadence Skill, and automate layout generation and verification while collaborating with process development, integration and design teams.