Senior Microcontroller Subsystem Architect

QUALCOMM, Inc.; Cork; Hybride; EUR 120 000 - 190 000; Plein temps

Avantages offerts par ce poste

Stock options

Maternity leave

Employee stock purchase scheme

Pension

Education assistance

Relocation support

Insurance

Bike scheme

Employee clubs

Résumé du poste

QT Technologies Ireland Limited in Cork, Ireland, is seeking a Senior Staff Engineer to lead Microcontroller Sub-System design, driving architecture and RTL quality across complex SoCs.

You will mentor engineers, collaborate with cross-functional teams, and optimize for area, power, and performance while ensuring robust design and post-silicon readiness. A strong background in digital logic and multi-clock domain systems is essential.

Qualifications

• Bachelor's degree in Science, Engineering, or related field required.
• 10+ years ASIC design experience with ownership of complex subsystems.
• Experience with multi-clock domain and low-power designs.

Responsabilités

• Micro-architecture and Technical Leadership: driving design trade-offs and architecture direction.
• RTL Development and Design Quality: leading RTL development with high performance and low power emphasis.
• Debugging and Post-Silicon Bring-Up: root-cause analysis and cross-functional resolution.
• Documentation and Reviews: produce design docs and lead architecture reviews.
• Design Optimization: balance area, power, and performance to meet requirements.
• Cross-Functional Collaboration: partner with DFT, Implementation, Verification, Emulation, and Firmware teams; mentor juniors.

Connaissances

Micro-architecture

RTL development

Debugging

Documentation

Design optimization

Cross-functional collaboration

Mentorship

Scripting

Technical leadership

Formation

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Description du poste

QT Technologies Ireland Limited in Cork, Ireland, is seeking a Senior Staff Engineer to lead Microcontroller Sub-System design, driving architecture and RTL quality across complex SoCs.

You will mentor engineers, collaborate with cross-functional teams, and optimize for area, power, and performance while ensuring robust design and post-silicon readiness. A strong background in digital logic and multi-clock domain systems is essential.