INTERN

Cadence Design Systems

Cork

On-site

EUR 24,000 - 32,000

Full time

10 days ago

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Cadence Design Systems in Cork, Ireland, invites applications for a Design Engineering Intern to join the Tensilica CPU Processor Team. This role focuses on RTL implementation of microprocessor cores and DSPs, supporting timing, area, and power goals within our R&D group.

The internship provides hands-on work with Verilog RTL, test planning, diagnostics, and collaboration with Design Verification and EDA teams while you pursue a degree in Electrical or Computer Engineering.

Qualifications

  • Deep understanding of Digital Design Fundamentals.
  • Excellent automation skills using Tcl, Perl, shell scripting.
  • Excellent oral and written communications skills.

Responsibilities

  • RTL implementation of microprocessor cores and DSPs; meet timing, area, and power goals.
  • Develop test plans, write functional diagnostics, debug failures, and analyze coverage.
  • Collaborate with Design Verification and EDA teams.

Skills

Digital Design Fundamentals
Excellent oral and written komunik

Education

Bachelor’s/Master’s in Electrical or Computer Engineering

Tools

Tcl
Perl
Shell scripting

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality.

This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation. Our customers are the world’s most innovative companies, delivering extraordinary electronic products—from chips to boards to systems for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Design Engineering Intern
Location: Cork
Job Overview:

The Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP’s. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 billion processor cores annually and expanding into intelligent system design and development.

Cadence Tensilica CPU Processor Team is hiring engineering interns to join our R&D team in Cork, Ireland. This is an amazing opportunity to work as a Graduate Engineer at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.

Come be part of this great Processor team where you can make an impact that is visible.

Job Responsibilities:

Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.

Position Requirements:
  • Pursuing Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a similar major.
  • Deep understanding of Digital Design Fundamentals
  • Excellent automation skills using Tcl, Perl, shell scripting
  • Excellent oral and written communications skills
  • Exposure to design automation tools is a plus

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

We’re doing work that matters. Help us solve what others can’t.
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

INTERN
INTERN

Cadence • Cork

On-site
EUR 18,000 - 26,000
Design Engineer Intern: RTL & Xtensa Cores
Design Engineer Intern: RTL & Xtensa Cores

Cadence • Cork

On-site
EUR 18,000 - 26,000
Lead Software Engineer - Compiler/LLVM
Lead Software Engineer - Compiler/LLVM

Cadence Design Systems • Cork

On-site
EUR 90,000 - 130,000
Private Medical and Dental plans
Group Personal Pension Plan
Cycle to work scheme and gym subsidy
+2
Software Engineer II - Compiler/LLVM
Software Engineer II - Compiler/LLVM

Cadence Design Systems • Cork

On-site
EUR 65,000 - 95,000
Competitive salary
25 days holiday
Private Medical
+8
Design Engineer Intern: RTL, Verilog & EDA in Cork
Design Engineer Intern: RTL, Verilog & EDA in Cork

Cadence Design Systems • Cork

On-site
EUR 24,000 - 32,000
Intern SSG
Intern SSG

Cadence Design Systems • Carrigaline

On-site
Confidential
Intern SSG
Intern SSG

Cadence Design Systems • Cork

On-site
EUR 17,000 - 21,000
Design Engineering Architect
Design Engineering Architect

Cadence Design Systems • Cork

On-site
EUR 120,000 - 180,000
SoC System Validation Intern (Pre-Silicon)
SoC System Validation Intern (Pre-Silicon)

Cadence Design Systems • Carrigaline

On-site
Confidential
Principal Design Engineer
Principal Design Engineer

Cadence Design Systems • Galway

On-site
EUR 120,000 - 180,000
Private Medical and Dental plans
Income Protection and Life Insurance
Group Pension Plan
+5