Design Engineer Intern: RTL & Xtensa Cores

Cadence; Cork; Vor Ort; EUR 18.000 - 26.000; Vollzeit

Zusammenfassung

Cadence in Cork, Ireland invites a Design Engineering Intern to join the Tensilica CPU Processor Team. You will contribute to RTL implementation, verification, and integration of Xtensa cores and related peripherals, with emphasis on timing, area, and power considerations.

This role offers hands-on experience in EDA workflows, synthesis, place & route, and collaboration with design verification teams. Pursuing a Bachelor’s or Master’s degree in Electrical or Computer Engineering, you’ll apply

Qualifikationen

• Strong understanding of digital design fundamentals.
• Automation scripting with Tcl, Perl, or shell.
• Excellent verbal and written communication skills.

Aufgaben

• Implement RTL for Xtensa processors and sub-systems; simulate, debug, and support synthesis, place & route.
• Collaborate with Verification and EDA teams to meet timing and power goals.

Kenntnisse

Digital Design Fundamentals

Automation scripting

Communications skills

Ausbildung

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Design Automation Tools

Jobbeschreibung

Cadence in Cork, Ireland invites a Design Engineering Intern to join the Tensilica CPU Processor Team. You will contribute to RTL implementation, verification, and integration of Xtensa cores and related peripherals, with emphasis on timing, area, and power considerations.

This role offers hands-on experience in EDA workflows, synthesis, place & route, and collaboration with design verification teams. Pursuing a Bachelor’s or Master’s degree in Electrical or Computer Engineering, you’ll apply