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Virtu Financial is seeking an FPGA/ASIC Engineer to join our Hardware Design team responsible for the FPGA and ASIC applications underpinning our low-latency trading platform.
The candidate will design RTL, own end-to-end development, and enhance build and verification infrastructure while working with a small, international team in a fast-paced financial technology environment.
Virtu's Hardware Design team builds the FPGA and ASIC applications at the core of the firm's proprietary low-latency trading platform.
We are looking for an FPGA/ASIC Engineer to join us. The ideal candidate will be a creative and ambitious hardware engineer who is excited to work on our low-latency trading infrastructure. You'll work on challenging problems alongside a small, international team.
Virtu offers a dynamic, meritocratic environment with a flat hierarchy. No finance background is necessary or expected. This is a great opportunity for the right candidate to start a career in the financial technology space.
Virtu Financial is an equal opportunity employer, committed to a diverse and inclusive workplace, welcoming you for who you are and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status.