GPU Physical Implementation Engineer

European Tech Recruit; Cork; On-site; EUR 90,000 - 130,000; Full time

Job summary

European Tech Recruit seeks a GPU Physical Implementation Engineer to join its graphics engineering organization. You will work on the implementation, verification, performance, and power optimisation of next-generation GPU cores across the SoC flow.

Collaborate with architects, circuit designers, verification, and software teams to meet demanding PPA targets through synthesis, place and route, STA, power analysis, and pre/post-silicon verification.

Qualifications

• Master’s or PhD in Electrical/Computer Engineering or CS.
• 2+ years of GPU engineering experience.
• Strong experience with P&R, synthesis flows, and methodologies.

Responsibilities

• Work across the SoC physical implementation flow to meet PPA targets.
• Participate in synthesis, place-and-route, STA, power analysis, and pre/post-silicon verification.
• Collaborate with architects, circuit designers, verification and software teams.

Skills

GPU engineering

Cross-functional work

Problem solving

Analytical skills

Documentation

Power optimisation

Scripting basics

Education

Master's or PhD in Electrical/Computer Engineering or CS

Tools

P&R tools

Synthesis tools

Cadence

Synopsys

Job description

GPU Physical Implementation Engineer

A leading technology company is looking for a GPU Physical Implementation Engineer to join its graphics engineering organisation and work on the implementation, verification, performance, and power optimisation of next-generation GPU cores.

This is an opportunity to work across the SoC physical implementation flow, collaborating with architects, circuit designers, verification engineers, and software teams to deliver GPU designs that meet demanding performance, power, and area (PPA) targets.

You’ll contribute across the implementation lifecycle, including synthesis, place and route, STA, power analysis, circuit design, process technology evaluation, and pre/post-silicon verification.

Ideal candidates will have:

• Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field
• 2+ years of relevant GPU engineering experience
• Strong experience with P&R / PnR and synthesis tools, flows, and methodologies
• Experience with SoC physical implementation and design methodologies
• Understanding of semiconductor process technology and technology nodes
• Knowledge of circuit design and semi-custom design methodologies
• Strong Static Timing Analysis (STA) experience
• Experience with power analysis and optimisation
• Experience balancing GPU performance, power, and functionality
• Ability to analyse benchmarks and test results to identify performance and power issues
• Experience working cross-functionally with hardware, software, architecture, and verification teams
• Strong technical problem-solving and analytical skills
• Ability to work effectively with ambiguous and complex technical requirements
• Strong technical documentation and communication skills

Preferred Qualifications:

• Experience with GPU architecture or graphics hardware
• Pre- and post-silicon GPU validation and verification
• Graphics workloads, benchmarking, and performance analysis
• Semi-custom circuit implementation
• Experience across multiple process technology nodes
• Experience developing or improving physical design flows and methodologies
• Knowledge of industry trends in GPU and graphics technology
• Experience working with third-party vendors and external engineering partners

Key Words:

• GPU Physical Implementation / GPU Engineer / Physical Design Engineer / Physical Implementation Engineer / GPU Design / Graphics Hardware / SoC / ASIC / Physical Design / P&R / PnR / Place and Route / Synthesis / STA / Static Timing Analysis / Power Analysis / PPA / Circuit Design / Semi-Custom Design / SoC Implementation / Process Technology / Technology Nodes / Timing Closure / Power Optimisation / GPU Architecture / Graphics / GPU Verification / Pre-Silicon / Post-Silicon / Benchmarking / Performance Optimisation / ASIC / Semiconductor / Cadence / Synopsys / Edinburgh / Cambridge / UK

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