Vision Processor Architect (Postdoc) – Edge FPGA RTL

Diversity Dashboard; Manchester; Hybrid; GBP 34,000 - 45,000; Full time

Benefits offered by this job

Hybrid working arrangements

Job summary

The University of Manchester invites applications for a Post-Doctoral Research Associate to lead the design of next-generation vision processor hardware, with a focus on near-sensor integration for advanced edge computing scenarios.

The role involves RTL-level design (Verilog/SystemVerilog or VHDL), system modelling, FPGA implementation with potential ASIC use, and hardware-software co-design within an EPSRC project partnership.

Qualifications

• PhD required or equivalent experience in a relevant field.
• Experience with RTL design and FPGA implementation.
• Familiarity with computer architecture and edge computing concepts.

Responsibilities

• Lead design of next-generation vision processor hardware.
• Carry out system modelling and design novel parallel processor architectures at RTL level.
• Implement digital systems using Verilog/SystemVerilog or VHDL and explore ASIC potential.
• Interface with high-speed sensors and develop practical technology demonstrations.

Skills

Verilog/SystemVerilog

VHDL

RTL design

FPGA development

Education

PhD in a relevant field

Tools

FPGAs

Job description

The University of Manchester invites applications for a Post-Doctoral Research Associate to lead the design of next-generation vision processor hardware, with a focus on near-sensor integration for advanced edge computing scenarios.

The role involves RTL-level design (Verilog/SystemVerilog or VHDL), system modelling, FPGA implementation with potential ASIC use, and hardware-software co-design within an EPSRC project partnership.