Snr FPGA Engineer

SSC Recruitment Solutions Ltd; Oxford; On-site; GBP 65,000 - 95,000; Full time

Job summary

SSC Recruitment Solutions Ltd is seeking a Senior FPGA Design Engineer to join our hardware development team in Oxford. You will design and verify FPGA code, push timing closure, and collaborate across electronics, mechanical and software disciplines to deliver high-performance products.

The role covers full lifecycle from concept to manufacturing support, with an emphasis on DFM/DFT and robust test coverage. Join a small, experienced team delivering industry-leading hardware solutions.

Qualifications

• Strong experience in VHDL with algorithm implementation.
• Verilog experience is advantageous.
• Experience with timing closure in FPGA projects.
• Knowledge of interface standards such as LVDS, PCIE, GMII, etc.
• Testbench generation and verification for new design features.
• Version control experience (Git, SVN).
• DFM/DFT and manufacturing-focused design experience would be advantageous.
• Education in Electronic Engineering or equivalent with relevant industry experience.

Responsibilities

• Design and verification of FPGA code for high-speed hardware products.
• Ensure timing closure and functional performance before release.
• Code reviews of VHDL/Verilog files.
• Collaborate with electronics, mechanical and software design teams.
• Ensure test coverage and regulatory compliance.
• Involve in full product lifecycle from concept to manufacturing support.

Skills

VHDL

Verilog

Timing closure

Testbench generation

Git/SVN

High-speed digital

DFM/DFT

Image sensors

Education

BEng/BSc Electronic Engineering

Job description

We are looking for a Senior FPGA Design Engineer to join the development team. You will form part of the team creating industry leading hardware products.

Key Responsibilities

• Design and verification of FPGA code for a range of hardware products including high-speed motion capture and video cameras, calibration devices and synchronisation and networking equipment.
• Ensure all FPGA designs achieve required level of timing closure and functional performance before release.
• Code reviews of existing and new VHDL/Verilog files.
• Working alongside a team comprising of electronic, mechanical and software design engineers in the creation of high performing and cost-effective solutions.
• Ensuring designs have appropriate test coverage for development and manufacture and that designs meet appropriate regulatory compliance.
• Full product lifecycle involvement from early conceptual studies through to manufacturing support post-release.

Required Skills, Knowledge and Expertise

• Strong demonstrable experience in VHDL including implementation of algorithms. Verilog experience an advantage.
• Experience in compilation timing closure is essential.
• Working knowledge of interface standards such as LVDS, PCIE, GMII etc
• Skilled in testbench generation and verification on new design features
• Competent with Version Control System tools, like Git, SVN, etc
• A knowledge of high-speed digital design, a working knowledge of analogue design and experience of developing products for manufacture with an emphasis on DFM/DFT would be advantageous.
• Suitable candidates will be educated to degree level in Electronic Engineering (or equivalent) with demonstrable and relevant industry experience.
• A working knowledge of image sensors, optics, Ethernet and RF Design would be advantageous, as would using AI to augment your work.

We're looking for an outgoing, confident and self-motivated candidate that will be a great fit within our small and highly experienced team of engineers