Ultra-Low Latency C++ Engineer with FPGA Trading

Testing Site - JPMC; Greater London; Presencial; GBP 120 000 - 180 000; Tempo integral

Resumo da oferta

JPMorganChase in London seeks an Ultra Low Latency C++ Lead Software Engineer within the Electronic Trading Technology team to design, build, and operate market gateway solutions with FPGA acceleration. You will collaborate with hardware and software teams to achieve deterministic performance and high reliability in production trading systems.

Responsibilities include leading latency optimization, developing across Unix/Linux, and ensuring observability and resiliency.

Qualificações

• Bachelor’s degree in Computer Science, Engineering, Mathematics or related field.
• Strong C++/Unix/Linux production experience and latency optimization.
• Experience with hardware/software integration (FPGA) and reliable systems.

Responsabilidades

• Design, develop, and test high-quality C++ code for trading connectivity and risk controls on Unix/Linux.
• Lead end-to-end low latency client setups, production rollout, and post-release validation.
• Collaborate with hardware teams to integrate FPGA pipelines with the software stack.

Conhecimentos

Modern C++

Unix/Linux

Multithreading

OO Design

Python

Debugging

Networking basics

Communication

Team collaboration

Formação académica

Bachelor’s degree in Computer Science, Engineering, Mathematics

Ferramentas

Verilog

VHDL

FPGA

Linux drivers

TCP/IP

Descrição da oferta de emprego

JPMorganChase in London seeks an Ultra Low Latency C++ Lead Software Engineer within the Electronic Trading Technology team to design, build, and operate market gateway solutions with FPGA acceleration. You will collaborate with hardware and software teams to achieve deterministic performance and high reliability in production trading systems.

Responsibilities include leading latency optimization, developing across Unix/Linux, and ensuring observability and resiliency.