Lead Software Engineer - C++ Developer

Testing Site - JPMC; Greater London; Sur place; GBP 120 000 - 180 000; Plein temps

Résumé du poste

JPMorganChase in London seeks an Ultra Low Latency C++ Lead Software Engineer within the Electronic Trading Technology team to design, build, and operate market gateway solutions with FPGA acceleration. You will collaborate with hardware and software teams to achieve deterministic performance and high reliability in production trading systems.

Responsibilities include leading latency optimization, developing across Unix/Linux, and ensuring observability and resiliency.

Qualifications

• Bachelor’s degree in Computer Science, Engineering, Mathematics or related field.
• Strong C++/Unix/Linux production experience and latency optimization.
• Experience with hardware/software integration (FPGA) and reliable systems.

Responsabilités

• Design, develop, and test high-quality C++ code for trading connectivity and risk controls on Unix/Linux.
• Lead end-to-end low latency client setups, production rollout, and post-release validation.
• Collaborate with hardware teams to integrate FPGA pipelines with the software stack.

Connaissances

Modern C++

Unix/Linux

Multithreading

OO Design

Python

Debugging

Networking basics

Communication

Team collaboration

Formation

Bachelor’s degree in Computer Science, Engineering, Mathematics

Outils

Verilog

VHDL

FPGA

Linux drivers

TCP/IP

Description du poste

Join us to shape the future of electronic trading technology, where your expertise in C++ and hardware acceleration will make a global impact. You’ll collaborate with talented engineers to deliver market-leading solutions that power high-speed trading across global markets. We value creativity, technical excellence, and a passion for continuous improvement. At JPMorganChase, you’ll find opportunities for career growth, skill development, and meaningful contributions. Be part of a team that thrives on solving complex challenges and advancing industry standards.

As an Ultra Low Latency C++ Lead Software Engineer at JPMorgan Chase in the Electronic Trading Technology team, you will design, build, and operate market gateway solutions with hardware FPGA acceleration. You will drive the software development lifecycle, focusing on stability, latency optimization, and continuous improvement. You’ll partner with hardware engineering teams to integrate FPGA pipelines with our C++ software stack, ensuring high reliability and operational excellence. Your work will directly impact trading connectivity and risk management applications used by clients and internal businesses. You’ll help foster a collaborative, innovative team culture.

Job Responsibilities:

• Execute creative software solutions across design, development, and troubleshooting.
• Design, develop, and test reliable, high-quality C++ code for trading connectivity and risk controls on Unix/Linux platforms.
• Implement end-to-end low latency client setups, including production rollout and post-release validation.
• Automate remediation for recurring issues to improve operational stability.
• Establish and execute test strategies for latency, throughput, and resiliency.
• Lead the development of market access trading and risk management modules.
• Participate across the software development lifecycle of electronic trading services.
• Collaborate with Application Development, Business Analysts, and Operations teams.
• Integrate FPGA pipelines with C++ software for deterministic performance.
• Ensure observability and operational excellence in production systems.
• Drive continuous improvement in latency optimization and system stability.

Required Qualifications, Capabilities, and Skills:

• Proficiency in modern C++ on Unix/Linux with strong multithreading and object-oriented design fundamentals.
• Hands-on experience in system design, application development, testing, and operational stability in production environments.
• Scripting skills (Python, Perl, Shell) for automating development, testing, and operational tasks.
• Advanced understanding of Agile methodologies, including CI/CD, resiliency, and security.
• Ability to review and debug code written by others.
• Knowledge of low-level TCP/IP and network stack behavior.
• Comfort working closely with infrastructure and networking teams.
• Bachelor’s degree in Computer Science, Engineering, Mathematics, or related discipline.
• Excellent understanding of software-hardware interaction.
• Commitment to high reliability and throughput in production software.
• Strong communication and collaboration skills.

Preferred Qualifications, Capabilities, and Skills:

• Low latency design and development experience in C/C++, including DMA or exchange connectivity and pre-trade risk systems.
• FPGA exposure for financial industry applications.
• Embedded software and kernel driver development for FPGAs and related systems.
• Experience with PCI Express, TCP/IP sockets, and L1/L3 switches.
• Integrating C++, Verilog, and VHDL solutions in Linux environments.
• Implementing and certifying exchange connectivity using FIX, SBE, and native binary protocols with a focus on low latency order entry.
• Creating and automating test strategies for functional and non-functional requirements in production-like environments.