Staff Edge AI Engineer - ML, Compiler & Hardware

Rivian; Greater London; Presencial; GBP 120.000 - 190.000; Jornada completa

Descripción de la vacante

Rivian is seeking a Staff Machine Learning/AI Engineer to expand our ML app and compiler ecosystem for edge AI platforms. This senior role strengthens porting models to RAP1-class platforms, enhances model enablement infrastructure, and helps shape the hardware-software roadmap.

You will lead ML enablement, build ingestion tooling, and advance quantization-aware training across accelerators. The position sits at the intersection of ML, compiler tech, and hardware-deployment, requiring

Formación

• Deep experience in ML systems and AI infrastructure.
• Expertise with edge deployment and model optimization.
• Experience with compiler/toolchain for ML workloads.

Responsabilidades

• Lead ML enablement workflows for Rivian edge AI platforms.
• Develop front-end compiler and model-ingestion tooling for RAP1 and future platforms.
• Develop and scale quantization-aware training and model optimization infrastructure.
• Port, optimize, validate, and benchmark models for hardware accelerators and NPUs.
• Improve performance across memory, scheduling, sparsity, and data movement with hardware teams.
• Collaborate across software, compiler, architecture, and product teams to identify high-value workloads.
• Provide technical leadership for engineers on model deployment and compiler infra.
• Shape Rivian's edge AI stack direction for larger neural networks.

Conocimientos

ML systems

Model deployment

AI infrastructure

Compiler toolchain

ONNX

Herramientas

Compiler toolchain

ONNX

Descripción del empleo

Rivian is seeking a Staff Machine Learning/AI Engineer to expand our ML app and compiler ecosystem for edge AI platforms. This senior role strengthens porting models to RAP1-class platforms, enhances model enablement infrastructure, and helps shape the hardware-software roadmap.

You will lead ML enablement, build ingestion tooling, and advance quantization-aware training across accelerators. The position sits at the intersection of ML, compiler tech, and hardware-deployment, requiring