Sr Analog Mixed Signal Verification Engineer - UK

TN United Kingdom; Scotland; On-site; GBP 50,000 - 80,000; Full time

Job summary

An established industry player is looking for a Senior Analog Mixed Signal Verification Engineer to join their innovative team in Edinburgh. This role is pivotal in developing advanced power control integrated circuits for automotive applications. You will be responsible for creating mixed-signal simulation environments, producing verification plans, and ensuring top-level verification sign-off. If you are passionate about cutting-edge technology and eager to collaborate with talented engineers, this opportunity offers a dynamic environment where your expertise will contribute significantly to groundbreaking projects.

Qualifications

• 5+ years of experience in AMS verification is required.
• Strong communication skills are essential for collaboration.

Responsibilities

• Implement chip-level mixed signal simulation environments.
• Coordinate verification with Digital and Analog Design teams.

Skills

AMS verification

Electrical Engineering

Verilog-AMS

Cadence AMS designer

Scripting (Tcl, Python)

Education

Bachelor's degree in Electrical and/or Electronic Engineering

Tools

Cadence AMS designer (Maestro/CLIPS)

Spectre/APS simulator

Jama

Job description

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Sr Analog Mixed Signal Verification Engineer - UK, Midlothian

Client:

microTECH Global Ltd

Location:

Edinburgh, UK

Job Category:

-

EU work permit required:

Yes

Job Reference:

4caf65d53c12

Job Views:

4

Posted:

18.04.2025

Expiry Date:

02.06.2025

Job Description:

Job Type: Permanent

Role overview:

We are seeking a Senior Analog Mixed Signal verification engineer to join my client’s expanding Design Centre in Edinburgh, Scotland. Critical to their new product development plans, the Centre designs advanced power control IC's for a broad range of product applications. My client is recognised world-wide as providing state-of-the-art automotive power integrated circuits. You will be part of a new verification team which collaborates on the mixed-signal verification of gate-driver ICs and embedded SoCs based on innovative new core architectures.

Responsibilities:

1. Implementation of chip-level mixed signal simulation environments
2. Production of AMS Verification Plan
3. Develop chip-level self-checking models
4. Chip top-level verification sign-off ahead of first silicon tapeout
5. Coordinate verification responsibilities with Digital and Analog Design/Verification teams
6. Maintenance and continuous improvement of verification methodology, automation and regression control

Key Relationships

Internal:

1. Collaborate with digital design and verification engineers
2. Collaborate with analog design engineers
3. Collaborate on requirements and test definition in Jama with the wider team

External:

1. Liaise with off-site design teams as required
2. Communicate with EDA and tool vendors

Requirements:

1. Possess at least a Bachelors degree in Electrical and/or Electronic Engineering or equivalent
2. Must have excellent written and verbal communication skills
3. Should have at least 5 years of experience in AMS verification
4. Must be knowledgeable in both analog and digital design fundamentals

Desirable:

1. Experience of SystemVerilog Assertions
2. Knowledge of UVM-MS concepts
3. Some scripting knowledge (e.g. Tcl, Python, POSIX shell)
4. Jama (or equivalent)

Skills, Knowledge and Aptitudes:

1. Cadence AMS designer (Maestro/CLIPS)
2. Verilog-AMS
3. Hierarchy Editor configuration
4. Custom connect modules and connect rules and/or IE cards
5. Spectre/APS simulator or Mentor equivalent
6. Real-Number Modeling: wreal, SV

If you are interested and suited, please