SoC Design & Verification Intern, Summer 2026

University of Delaware; United Kingdom; On-site; GBP 18,000 - 25,000; Full time

Job summary

The University of Delaware is offering a 12-month placement for students, ideally those currently in their 2nd year looking to complete their 3rd year in Industry. This position provides valuable experience in a high-tech environment.

You will assist with System Verilog RTL Design, pre-silicon verification, validation testing, and technical documentation. The role is scheduled to commence in Summer 2026, providing a unique opportunity to engage in real-world engineering projects.

Qualifications

• Currently in their 2nd year of study in electronic, electrical, or computer engineering.
• Interest in a full product development lifecycle.

Responsibilities

• Assist the design engineering staff on System Verilog RTL Design.
• Assist pre-silicon verification engineering staff using UVM/SV.
• Assist in validation testing of new products.
• Work on improving design automation scripts.
• Work on writing or improving technical documentation.

Job description

The University of Delaware is offering a 12-month placement for students, ideally those currently in their 2nd year looking to complete their 3rd year in Industry. This position provides valuable experience in a high-tech environment.

You will assist with System Verilog RTL Design, pre-silicon verification, validation testing, and technical documentation. The role is scheduled to commence in Summer 2026, providing a unique opportunity to engage in real-world engineering projects.