Open-Source Digital Design Intern (SystemVerilog)

Fast Forward; Cambridge; Hybrid; GBP 30,000 - 35,000; Full time

Benefits offered by this job

Mentorship from engineers

Flexible hybrid working environment

Open-source project experience

Job summary

lowRISC is seeking a Summer Intern in Cambridge to join our hardware engineering team. You will gain hands-on experience in digital design and verification for open-source semiconductor projects, with exposure to SystemVerilog, UVM, and Python tooling.

Ideal candidates are pursuing Computer Science or Electronic Engineering, in 2nd year or above, with interest in hardware design and verification. The role offers a competitive internship salary and a flexible hybrid work arrangement.

Qualifications

• Pursuing Computer Science, Electronic Engineering or related field (2nd year Bachelors or part way through Masters/PhD).
• Experience or interest in digital design or verification.
• Familiarity with hardware description languages and scripting for verification is plus.

Responsibilities

• Assist digital design workflows using SystemVerilog or equivalent.
• Develop testbenches and automated verification scripts (UVM or equivalent).
• Analyze verification results to improve hardware reliability and contribute to open-source repos.

Skills

Digital design

Design verification

Python scripting

Education

2nd year Bachelor's or higher

Tools

SystemVerilog

UVM

Python

Job description

lowRISC is seeking a Summer Intern in Cambridge to join our hardware engineering team. You will gain hands-on experience in digital design and verification for open-source semiconductor projects, with exposure to SystemVerilog, UVM, and Python tooling.

Ideal candidates are pursuing Computer Science or Electronic Engineering, in 2nd year or above, with interest in hardware design and verification. The role offers a competitive internship salary and a flexible hybrid work arrangement.