Senior Power Semiconductor Design Engineer (Si/SiC)

IC Resources; Bedford; On-site; GBP 70,000 - 110,000; Full time

Job summary

IC Resources is recruiting on behalf of an international client for a Senior Power Semiconductor Design Engineer in Bedford. You will lead design and development of power semiconductor devices (silicon and SiC) for overvoltage and overcurrent protection, guiding modeling, layout, qualification and release processes.

Responsibilities include device design for internal and external wafer fabrication, collaboration with product teams, and applying DOE, SPC, DFM and Six Sigma methods to optimize

Qualifications

• Proven experience designing power semiconductor devices in silicon or SiC.
• Strong understanding of semiconductor physics.
• Wafer fabrication and design of Experiments (DOE).
• Statistical Process Control (SPC) in manufacturing.
• Failure analysis and reliability testing experience.
• Experience with CAD/design tools such as Silvaco.

Responsibilities

• Design and layout semiconductor devices for wafer fabrication (internal and external).
• Collaborate with product management, sales, and applications teams to define and develop new products.
• Apply DOE, SPC, DFM, FMEA, and Six Sigma methodologies to optimize designs and processes.
• Perform device modelling, simulation, characterization, testing, reliability assessment, and failure analysis.
• Prepare engineering documentation, product specifications, and datasheets for release and compliance.
• Support transfer of products from development into production.

Skills

Semiconductor physics

Wafer fabrication processes

DOE

SPC

Failure analysis

Reliability testing

Silvaco

Education

Degree in Engineering, Physics, Materials Science, or related field

Tools

Silvaco

Job description

IC Resources is recruiting on behalf of an international client for a Senior Power Semiconductor Design Engineer in Bedford. You will lead design and development of power semiconductor devices (silicon and SiC) for overvoltage and overcurrent protection, guiding modeling, layout, qualification and release processes.

Responsibilities include device design for internal and external wafer fabrication, collaboration with product teams, and applying DOE, SPC, DFM and Six Sigma methods to optimize