Staff Power Integrity Engineer: AI Hardware Leader

Graphcore; West of England; Hybrid; GBP 100,000 - 130,000; Full time

Benefits offered by this job

Flexible working

Generous leave

Pension matching

Phantom equity

On-site barista

Job summary

Graphcore is seeking a Staff Power Integrity Engineer to shape the power-delivery architecture behind its AI compute systems. You’ll provide technical leadership on the company’s most complex PI challenges, influence architecture decisions and sign-off approaches across silicon, package, board and systems.

You’ll model strategies, optimise decoupling and analyse PDN impedance, droop and transient response while mentoring engineers and driving practice improvements within the Signal and Power

Qualifications

• Deep practical expertise in power integrity and complex power-delivery network design.
• Strong understanding of PDN impedance, transient behaviour, voltage droop, resonance, stability and decoupling across high-current digital systems.
• Ability to reason across silicon, package, PCB, voltage regulation and system boundaries.
• Strong capability in electromagnetic modelling, circuit simulation, model extraction and selecting appropriate abstraction methods.
• Engineering judgement to assess model validity, uncertainty and sensitivity, then translate analysis into architecture and product decisions.
• Ability to lead ambiguous technical work, influence across engineering disciplines, improve methodology and develop other engineers.

Responsibilities

• Own complex PI problems and drive them to resolution across silicon, package, board and systems.
• Mentor engineers and raise PI capability across Graphcore.
• Communicate risk clearly and help teams make pragmatic trade-offs.

Skills

Power integrity

PDN impedance

Transient analysis

Silicon/package/PCB

EM modelling

Model extraction

Architecture decisions

Leadership

Mentoring

Job description

Graphcore is seeking a Staff Power Integrity Engineer to shape the power-delivery architecture behind its AI compute systems. You’ll provide technical leadership on the company’s most complex PI challenges, influence architecture decisions and sign-off approaches across silicon, package, board and systems.

You’ll model strategies, optimise decoupling and analyse PDN impedance, droop and transient response while mentoring engineers and driving practice improvements within the Signal and Power