Senior FPGA/IP Design Engineer — Remote, 100Gb PCIe Gen5

N Consulting Limited; Belfast; Remote; GBP 32,081 - 40,101; Full time

Job summary

A technology consulting firm is looking for a highly skilled Senior IP Design Engineer (FPGA / Adaptive SoC). This is a fully remote opportunity for candidates in the UK or Eastern Europe. You will design and develop high-performance IP cores while collaborating with various teams. Requirements include strong experience in SystemVerilog RTL design and familiarity with FPGA design flows. The role offers a contract duration of 6 months with a daily rate between €200 - €250.

Qualifications

• Strong experience in SystemVerilog RTL design.
• Proven expertise with 100Gb Ethernet, PCIe Gen5, and AMBA/AXI protocols.
• Hands-on experience with synthesis, place & route, and timing closure.

Responsibilities

• Design and implement high-performance, synthesis-ready IP cores using SystemVerilog RTL.
• Develop IP for high-speed interfaces, including 100Gb Ethernet.
• Drive FPGA/Adaptive SoC design flow, including synthesis and timing closure.

Skills

SystemVerilog RTL design

High-speed interfaces (100Gb Ethernet, PCIe Gen5, AMBA/AXI)

Performance optimization

Python scripting

Tcl scripting

Git and CI/CD environments

Tools

Vivado/Vitis

Job description

A technology consulting firm is looking for a highly skilled Senior IP Design Engineer (FPGA / Adaptive SoC). This is a fully remote opportunity for candidates in the UK or Eastern Europe. You will design and develop high-performance IP cores while collaborating with various teams. Requirements include strong experience in SystemVerilog RTL design and familiarity with FPGA design flows. The role offers a contract duration of 6 months with a daily rate between €200 - €250.