Senior FPGA Firmware Architect – Defense Tech Leader

Ultra I&C

Maidenhead

On-site

GBP 80,000 - 120,000

Full time

14 days+

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Benefits offered by this job

Annual Bonus Scheme
Private Medical Cover
25 days’ holiday (plus Bank Holidays)
Pension Contribution
4 x Life Assurance Cover
Flexible working hours

Job summary

Ultra Intelligence & Communications is seeking a Principal Firmware (FPGA) Engineer to lead architecture, design, implementation and verification of FPGA-based firmware. You will work with multidisciplinary teams to guide complex projects from concept through qualification and deployment in defense systems.

You will champion robust firmware development, mentor engineers, ensure compliance with standards, and contribute to secure, high-performance hardware across Xilinx / Altera toolchains.

Qualifications

  • Engineering degree or equivalent experience.
  • Proficient in VHDL and FPGA design.
  • Experience with FPGA toolchains (Xilinx, Altera/Intel, Lattice).
  • Ability to lead architecture, design, verification of firmware for FPGA-based systems.
  • Strong communication and leadership for cross-functional teams.

Responsibilities

  • Lead architecture, design, implementation and verification of FPGA-based firmware.
  • Guide complex firmware projects from concept to deployment.
  • Mentor less experienced engineers and chair technical reviews.
  • Ensure compliance with standards and robust, secure firmware.

Skills

Firmware development
FPGA design
VHDL
FPGA toolchains
Technical leadership

Education

Engineering degree or equivalent experience

Tools

Xilinx FPGA tools
Lattice FPGA tools
Altera/Intel FPGA tools

Job description

Ultra Intelligence & Communications is seeking a Principal Firmware (FPGA) Engineer to lead architecture, design, implementation and verification of FPGA-based firmware. You will work with multidisciplinary teams to guide complex projects from concept through qualification and deployment in defense systems.

You will champion robust firmware development, mentor engineers, ensure compliance with standards, and contribute to secure, high-performance hardware across Xilinx / Altera toolchains.

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