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Senior Digital FPGA Engineer

JR United Kingdom

Chester

Hybrid

GBP 50,000 - 80,000

Full time

3 days ago
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Job summary

A leading machine learning business in Cambridge seeks a Senior Digital FPGA Engineer. In this role, you will design and develop FPGAs, leveraging your expertise in SystemVerilog, to support innovative financial technology solutions. Excellent benefits, hybrid work options, and a vibrant culture await you.

Benefits

Fantastic benefits package
Hybrid working (3 days on site, 2 at home)

Qualifications

  • Experience developing and testing FPGA's.
  • Proficiency in SystemVerilog, VHDL and/or Verilog.
  • Software skills in C / C++ or Python.

Responsibilities

  • Develop FPGA's using SystemVerilog for low-latency applications.
  • Collaborate with software and machine learning experts.

Skills

FPGA Design
SystemVerilog
C / C++
Python
VHDL
Low latency

Tools

Quartus
Vivado

Job description

Social network you want to login/join with:

Senior Digital FPGA Engineer - IP / Machine Learning in job available in Cambridge, Cambridgeshire

  • Cambridge based business in the technology hub of the UK
  • Rare opportunity to be part of a leading Machine Learning / AI technology business
  • Fantastic benefits package and salaries on offer, including hybrid working (3 days on site, 2 at home)

A leading machine learning business involved in developing incredible financial industry technology are seeking skilled Senior Digital Design and FPGA Engineers to join their HQ in Cambridge. This company offers fantastic benefits, an enjoyable work culture and a real challenge, with exciting investment into new innovation.

As a Senior Digital FPGA Engineer you will develop FPGA's using SystemVerilog. You'll work closely with software and machine learning experts to help build low-latency / high-throughput applications.

What skills and experience is required:

  • FPGA Design, development and testing experience
  • Previous experience in using SystemVerilog, VHDL and/or Verilog
  • Software skills using C / C++ or Python
  • Exposure to Quartus and/or Vivado
  • Any exposure or understanding of low latency, machine learning, or neutral network architectures would be beneficial but not essential.

If this hybrid Senior Digital FPGA Engineer job in Cambridge sounds of interest, please apply with your CV.

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