Senior Digital FPGA Engineer

JR United Kingdom; Liverpool; Hybrid; GBP 50,000 - 70,000; Full time

Job summary

A leading machine learning business located in Cambridge is seeking a Senior Digital FPGA Engineer specializing in SystemVerilog to join its innovative team. This is a unique opportunity to work at the forefront of AI technology in the financial sector, offering competitive salaries, a hybrid working model, and exciting projects. Qualified candidates will have solid FPGA design experience and software skills in C/C++ or Python.

Benefits

Hybrid working (3 days on site, 2 at home)

Fantastic benefits package

Qualifications

• Experience with FPGA design and development required.
• Proficient in SystemVerilog; VHDL or Verilog knowledge is advantageous.
• Software skills in C/C++ or Python are necessary.

Responsibilities

• Develop FPGA's using SystemVerilog for low-latency applications.
• Collaborate closely with software and machine learning teams.

Skills

FPGA Design

SystemVerilog

VHDL

C / C++

Python

Quartus

Vivado

Machine Learning

Job description

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Senior Digital FPGA Engineer - IP / Machine Learning in job available in Cambridge, Cambridgeshire

• Cambridge based business in the technology hub of the UK
• Rare opportunity to be part of a leading Machine Learning / AI technology business
• Fantastic benefits package and salaries on offer, including hybrid working (3 days on site, 2 at home)

A leading machine learning business involved in developing incredible financial industry technology are seeking skilled Senior Digital Design and FPGA Engineers to join their HQ in Cambridge. This company offers fantastic benefits, an enjoyable work culture and a real challenge, with exciting investment into new innovation.

As a Senior Digital FPGA Engineer you will develop FPGA's using SystemVerilog. You'll work closely with software and machine learning experts to help build low-latency / high-throughput applications.

What skills and experience is required:

• FPGA Design, development and testing experience
• Previous experience in using SystemVerilog, VHDL and/or Verilog
• Software skills using C / C++ or Python
• Exposure to Quartus and/or Vivado
• Any exposure or understanding of low latency, machine learning, or neutral network architectures would be beneficial but not essential.

If this hybrid Senior Digital FPGA Engineer job in Cambridge sounds of interest, please apply with your CV.