Senior Digital Design Engineer (Hybrid) ASIC Frontend Lead

Guideposts Trust Limited

Greater London

Hybrid

GBP 90,000 - 150,000

Full time

9 days ago
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Benefits offered by this job

Hybrid work model
London offices and labs
Private healthcare
Dental and optical cover
33 days annual leave
Team socials and company days

Job summary

MintNeuro in London seeks a Senior Digital Design Engineer to own front-end digital design and verification for next-generation mixed-signal ASICs used in implantable neural interfaces.

You will write clean Verilog/SystemVerilog, develop robust verification environments, drive RTL from concept to tape-out, and collaborate with analog, hardware, and software teams in a fast-paced startup.

Qualifications

  • Strong front-end digital ASIC design and synthesis experience.
  • Experience in digital verification with structured, self-checking testbenches and coverage analysis.
  • Ability to own the digital subsystem and drive designs through to tape-out.

Responsibilities

  • Lead the architecture, specification, and implementation of digital control, telemetry/serial communication, and power sequencing for mixed-signal ASICs.
  • Develop clean, synthesizable Verilog/SystemVerilog RTL with emphasis on ultra-low-power operation.
  • Collaborate closely with analog IC designers to define mixed-signal boundaries and clock generation.
  • Define verification strategies and build self-checking testbenches at block and system level to ensure thorough functional coverage.
  • Implement functional safety and fault-tolerant mechanisms for safety-critical reliability.
  • Perform front-end RTL quality checks including linting, CDC/RDC analysis, and timing reviews.
  • Collaborate with backend teams during silicon bring-up and lab validation, and support pre-silicon validation using FPGAs.
  • Produce clear architecture specifications, register maps, verification plans, and technical review records.

Skills

Verilog/SystemVerilog
Digital ASIC design
Digital verification
CDC analysis
RTL timing
Tape-out ownership
Technical communication

Education

Electrical/Electronic Engineering or related

Tools

In-house backend tools
FPGA prototyping
Synthesis/STA tools

Job description

MintNeuro in London seeks a Senior Digital Design Engineer to own front-end digital design and verification for next-generation mixed-signal ASICs used in implantable neural interfaces.

You will write clean Verilog/SystemVerilog, develop robust verification environments, drive RTL from concept to tape-out, and collaborate with analog, hardware, and software teams in a fast-paced startup.

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