Senior Digital ASIC/SoC Design Engineer (Hybrid)

Technical Futures Ltd; Cambridge; Hybrid; GBP 55,000 - 90,000; Full time

Job summary

Technical Futures Ltd in Cambridge is seeking a Digital ASIC Design Engineer to design and implement FPGA-based SoC systems. Hybrid working (up to 3 days per week from home) and a very generous salary on offer.

Applications welcome from mid to senior level engineers with strong VHDL/Verilog, RTL verification and Python skills, plus experience in SoC design and integration. You will work closely with hardware, software and mechanical teams to bring new imaging/AR products to market.

Qualifications

• Bachelor’s / Master’s in Electronic Engineering or related discipline.
• Solid FPGA, VHDL / Verilog skills.
• SoC design and Integration experience.
• Python skills.
• RTL Verification experience.
• Experience writing timing constraints and ensuring these are met.
• Designing for low power.

Responsibilities

• Design and implement FPGA-based SoC systems.
• Collaborate with hardware, software and mechanical engineers to bring products to market.
• Ensure timing constraints are met and optimize for low power.

Skills

FPGA

VHDL

Verilog

RTL Verification

SoC design

Python

Timing constraints

Low power design

Education

Bachelor's / Master’s in Electronic Engineering

Job description

Technical Futures Ltd in Cambridge is seeking a Digital ASIC Design Engineer to design and implement FPGA-based SoC systems. Hybrid working (up to 3 days per week from home) and a very generous salary on offer.

Applications welcome from mid to senior level engineers with strong VHDL/Verilog, RTL verification and Python skills, plus experience in SoC design and integration. You will work closely with hardware, software and mechanical teams to bring new imaging/AR products to market.