Senior Design Verification Engineer – IP/SoC Testbenches

IC Resources; West of England; Vor Ort; GBP 108.000 - 132.000; Vollzeit

Benefits dieser Stelle

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Performance-based bonus scheme

Zusammenfassung

IC Resources is partnering with a US-based start-up expanding into the UK to build a cutting-edge hardware team. You will join as a Design Verification Engineer, developing testbenches for highly configurable IPs and interconnects across SoCs and multi-chiplet systems.

Expect to work with UVM-based environments, Verilog/SystemVerilog, Python tooling, and Arm AMBA protocols (AXI/APB/AHB). On-site roles available in Bristol or Cambridge with a potential bonus and share options.

Qualifikationen

• BS, MS in Electrical Engineering, Computer Engineering or Computer Science.
• 6+ years hands-on experience in block-level/IP-level/SoC-level verification.
• Proficiency in Verilog and SystemVerilog.
• Experience with UVM-based testbenches.
• Familiarity with Arm AMBA protocols AXI/APB/AHB.
• Knowledge of Arm CHI protocol is a plus.
• Experience on IPs for caches, memory subsystems, interconnects and NoCs is a plus.
• Experience with formal verification techniques, emulation platforms is a plus.

Aufgaben

• Create test plans for configurable IPs to provide interconnectivity across an SoC, chiplet, or multi-chiplet systems.
• Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards.
• Collaborate with software teams to define and implement configurable testbenches.
• Work with design teams on test plans, failure debug, coverage, etc.

Kenntnisse

Verilog

SystemVerilog

UVM-based testbenches

Python

Arm AMBA AXI/APB/AHB

CHI protocol

Cache / memory subsystems / NoCs

Formal verification

Emulation platforms

EDA tools

Ausbildung

BS in Electrical Engineering or Computer Engineering or Computer Science

MS in Electrical Engineering or Computer Engineering or Computer Science

Tools

Simulation tools

Debug tools

Emulation platforms

Formal verification tools

Jobbeschreibung

IC Resources is partnering with a US-based start-up expanding into the UK to build a cutting-edge hardware team. You will join as a Design Verification Engineer, developing testbenches for highly configurable IPs and interconnects across SoCs and multi-chiplet systems.

Expect to work with UVM-based environments, Verilog/SystemVerilog, Python tooling, and Arm AMBA protocols (AXI/APB/AHB). On-site roles available in Bristol or Cambridge with a potential bonus and share options.