Senior CPU Architect: Shape Next-Gen Processors

European Tech Recruit

Cambridge

On-site

GBP 110,000 - 170,000

Full time

4 days ago
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Job summary

European Tech Recruit seeks a seasoned CPU Architect to shape the next generation of high-performance processors in Cambridge. This senior IC role blends strategic influence with hands-on design, exploring ISA and microarchitecture for HW/SW co-design.

You will lead architectural exploration, build cycle-accurate models in C++, C and Python, and collaborate with compiler/OS teams to translate workloads into architectural requirements for future CPUs.

Qualifications

  • 10+ years in high-performance CPU architecture.
  • Expert knowledge of out-of-order and speculative execution and cache hierarchies.
  • Strong ISA design understanding and memory-consistency models.
  • Experience with cycle-accurate architectural simulators in C/C++/Python.

Responsibilities

  • Lead architectural exploration and pathfinding for future CPU designs.
  • Develop microarchitectural concepts across fetch/decode, pipelines and memory systems.
  • Define ISA enhancements including vector/matrix extensions.
  • Analyze workloads to translate findings into architectural requirements.
  • Collaborate with compiler, OS and application specialists on HW/SW co-design.
  • Guide creation of cycle-accurate CPU simulation models in C++, C and Python.
  • Evaluate proposals against performance, power and area targets.
  • Provide senior technical leadership and long-term roadmaps.

Skills

OOO execution
Speculative execution
Branch prediction
Cache hierarchies
Coherency protocols
ISA design
Memory-consistency models
Virtualisation
Performance profiling
Cycle-accurate simulators

Education

Master's degree in Computer Engineering/CS/EE
PhD in Computer Engineering/CS/EE

Tools

Perf
VTune
SimPoints

Job description

European Tech Recruit seeks a seasoned CPU Architect to shape the next generation of high-performance processors in Cambridge. This senior IC role blends strategic influence with hands-on design, exploring ISA and microarchitecture for HW/SW co-design.

You will lead architectural exploration, build cycle-accurate models in C++, C and Python, and collaborate with compiler/OS teams to translate workloads into architectural requirements for future CPUs.

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