Senior Analog ASIC Lead Engineer

Renesas; City of Edinburgh; On-site; GBP 120,000 - 160,000; Full time

Job summary

Renesas Edinburgh is seeking a Senior Manager Analog Engineering to design and verify CMOS analog blocks for custom ASICs, lead full-chip blocks, and drive production ramps. You will collaborate across analogue/digital teams to define system strategy and ensure high-quality physical implementations with DFT alignment.

The role requires 10+ years in analog circuit design, a relevant Electronics/Microelectronics degree, and strong leadership, mentoring, and cross-cultural collaboration skills.

Qualifications

• Degree level qualification in Electronics/Microelectronics Engineering or a related discipline is required
• 10+ years of relevant analog circuit design experience.
• Hands-on experience in the design and verification of analogue circuit blocks such as amplifiers, oscillators, LDOs, comparators, reference/biasing circuits, PMIC and audio sub-blocks
• Experience in leading the development of switching converter or audio systems.
• Ability to lead a team and deliver chip level solutions through collaboration with analogue, digital, verification, layout, applications and test teams.
• Experience of chip-level verification including AMS and DMS.
• Strong competence with EDA design tools and the Cadence design environment.
• Enforce common methodology across whole team.
• Ability to make good judgement in selecting method and techniques for obtaining solutions.
• Able to confidently share own expertise and work with others.
• Ability to propose innovative solutions.
• Ability to make significant contributions to projects, programs and business initiatives with creativity and ingenuity.
• Ability to support and mentor less experienced team members.
• Cross cultural awareness and sensitivity.
• Results-oriented and able to deliver on-time under tight schedule.
• Ability to work both independently and part of a team.
• Flexibility to undertake occasional international travel at short notice.
• Excellent command of verbal and written English.
• Concise and precise communication and presentation skills within multi-site and multi-cultural environment.

Responsibilities

• Design and verify CMOS major analog blocks for custom ASICs to meet performance, area, power and timescale constraints.
• Take technical leadership of full-chip or major system level blocks and drive projects from specification to production ramp.
• Collaborate with analogue and digital leads to achieve system and design strategy for custom ASICs and drive layout team to high quality physical implementation.
• Produce high quality documentation for designed circuits.
• Work closely with DFT engineers to ensure alignment to DFT strategy and implementation.
• Drive silicon debugging and design characterisation.
• Work with test and product engineers to support test development and ramp to production.
• Take a proactive approach to driving own development plan, utilising team members and internal development opportunities.
• Maintain technical project involvement at principal level and drive consistent methodology engagement across the team.
• Design and verify analog block-level, sub-system and chip-level circuits to meet the functional and performance specifications of custom mixed-signal ASICs.
• Lead a group of engineers technically to deliver a given block on time.
• Translate customer requirements into design specifications and design solutions.

Skills

Analog circuit design

AMS/DMS verification

Leadership

Team collaboration

Project management

Mentoring

English communication

Cross-cultural awareness

Judgement and technique selection

Innovation and problem solving

Education

Electronics/Microelectronics Engineering degree

Tools

Cadence design tools

Job description

Renesas Edinburgh is seeking a Senior Manager Analog Engineering to design and verify CMOS analog blocks for custom ASICs, lead full-chip blocks, and drive production ramps. You will collaborate across analogue/digital teams to define system strategy and ensure high-quality physical implementations with DFT alignment.

The role requires 10+ years in analog circuit design, a relevant Electronics/Microelectronics degree, and strong leadership, mentoring, and cross-cultural collaboration skills.