Power Integrity & EMIR Engineer for SoC Signoff

Aion Silicon Ltd; West of England; On-site; GBP 65,000 - 95,000; Full time

Job summary

Aion Silicon Ltd is seeking an EMIR/Power Integrity Engineer to join our SoC Physical Design team. You will perform PDN planning, EMIR verification, and signoff for advanced semiconductor designs, ensuring reliable power delivery through static and dynamic IR drop analysis.

You will collaborate with PD, CAD, RTL, package and reliability teams, develop automation flows in Tcl/Python, and contribute to signoff methodology and ECO implementations across 7nm/5nm nodes.

Qualifications

• Bachelor's or Master's degree in Electrical/Electronics Engineering or related field.
• 5+ years of ASIC/SoC EMIR experience.
• Knowledge of UPF and low-power design methodologies.
• Experience developing signoff methodologies and CAD automation flows.
• Understanding of package parasitics and power delivery architecture.
• Strong analytical, debugging, and communication skills.

Responsibilities

• Perform Power Integrity and EMIR analysis for complex SoC, subsystem, and IP designs.
• Develop, analyze, and optimize Power Delivery Networks (PDN) to meet performance, power, and reliability requirements.
• Execute Static IR Drop, Dynamic IR Drop, and Electromigration (EM) analysis throughout the design cycle.
• Define simulation methodologies, run setups, and signoff criteria for power integrity verification.
• Develop and enhance CAD-based EMIR analysis flows incorporating timing, package, and board-level abstractions.
• Identify, debug, and root-cause EM, Static IR, and Dynamic IR violations.
• Provide and implement ECO solutions to resolve power integrity violations, including power grid enhancements, strap optimization, cell spreading, decap insertion, power routing improvements, and layout modifications.
• Validate ECO effectiveness through iterative EMIR analysis and drive complete signoff closure.
• Collaborate closely with Physical Design, CAD, RTL, Package, and Reliability teams to achieve power integrity goals.
• Automate analysis, debugging, and reporting flows using Tcl, Python, Perl, or Shell scripting.
• Support advanced technology nodes and contribute to methodology development and continuous improvement.

Skills

PDN design

EMIR

IR drop static

IR drop dynamic

Power integrity

Reliability concepts

Scripting

Education

Bachelors/Masters in Electrical/Electronics Engineering

Tools

Cadence Voltus

Ansys RedHawk

RedHawk-SC

PrimeRail/PrimePower

Innovus

ICC2

FC_SHELL

Job description

Aion Silicon Ltd is seeking an EMIR/Power Integrity Engineer to join our SoC Physical Design team. You will perform PDN planning, EMIR verification, and signoff for advanced semiconductor designs, ensuring reliable power delivery through static and dynamic IR drop analysis.

You will collaborate with PD, CAD, RTL, package and reliability teams, develop automation flows in Tcl/Python, and contribute to signoff methodology and ECO implementations across 7nm/5nm nodes.