Pioneering Inference Hardware Architect (Silicon)

Gradiant; United Kingdom; Remote; GBP 70,000 - 110,000; Full time

Job summary

Gradiant is seeking a design engineer to shape model-specific inference hardware from performance modeling through RTL and verification.

You will join the initial silicon team, exploring architectures for inference workloads and turning selected designs into working silicon. You will own substantial parts of the design and wire through performance modeling, microarchitecture and verification as needed.

Qualifications

• Experience in at least one core area: microarchitecture, performance modeling, RTL design or verification.
• Ability to write SystemVerilog and use Python or C++ for modeling, automation and verification.
• Understanding of pipelines, memory systems, interconnects, and ASIC design flows.
• Ability to translate incomplete workload evidence into testable design questions and explain trade-offs using measurements.

Responsibilities

• Turn workload measurements into design requirements.
• Build cycle-accurate models to compare compute units, numerical formats, memory systems, dataflows, and interconnects.
• Own one or more design areas from microarchitecture through RTL implementation.
• Write test plans, build verification environments, and close functional and performance coverage.
• Use power, performance, area, and verification results to revise the design.
• Define hardware-software interfaces and the low-level execution model with the inference research team.
• Automate architecture exploration, simulation, regression testing, and analysis.
• Support emulation, tape-out, and silicon bring-up as the program advances.

Skills

Microarchitecture

Performance modeling

RTL design

Design verification

SystemVerilog

Python

C++

Job description

Gradiant is seeking a design engineer to shape model-specific inference hardware from performance modeling through RTL and verification.

You will join the initial silicon team, exploring architectures for inference workloads and turning selected designs into working silicon. You will own substantial parts of the design and wire through performance modeling, microarchitecture and verification as needed.