Physical Design Engineer

IC Resources; Reading; On-site; GBP 55,000 - 75,000; Full time

Job summary

IC Resources is seeking a Physical Design Engineer in Reading or Cambridge to join a small, highly technical R&D team focused on next‑generation high-speed circuit and communications technology.

You will work across the full RTL to GDS flow, gaining exposure to advanced process nodes and signoff methodologies in a production‑oriented environment. The role offers hands-on design opportunities and the chance to influence methodologies within a focused team.

Qualifications

• Strong experience across the digital Physical Design flow from RTL through to GDS (full flow).
• Experience with advanced process nodes, ideally 7nm or below.
• Good understanding of modern implementation and signoff methodologies.
• Exposure to physical verification and signoff.

Responsibilities

• Full RTL to GDS experience across synthesis, place & route and signoff.
• Work on advanced semiconductor designs and contribute to new architectures rather than just implementing established designs.
• Support the full implementation flow from RTL to GDS and signoff in a high-technology R&D environment.

Skills

RTL to GDS flow

7nm or below process nodes

Timing closure

Physical verification

Scripting TCL/Python/Shell

SerDes exposure

Mixed-signal familiarity

Tools

Cadence tools

Job description

Physical Design Engineer - Reading or Cambridge

This is an exciting opportunity to join small advanced R&D team that is looking to expand. They are looking for a Physical Design Engineer to work on next generation high speed circuit and communications technology.

This is an opportunity to work on advanced semiconductor technology within a highly technical R&D environment, where Physical Design is involved in taking new architectures from development through towards production silicon.

The role would suit a Physical Design Engineer who enjoys working across the full implementation flow and wants exposure to challenging designs at advanced process nodes.

What makes the role interesting:

• Work on advanced semiconductor designs using modern process technologies
• Opportunity to contribute to new architectures rather than simply implementing established designs
• Full RTL to GDS experience across synthesis, place & route and signoff
• Small, technically focused R&D environment with significant scope to influence methodologies and implementation
• Research and development work has a clear route towards future production silicon

The ideal Physical Design Engineer will have:

• Strong experience across the digital Physical Design flow from RTL through to GDS
• Experience working on advanced process nodes, ideally 7nm or below
• Good understanding of modern implementation and signoff methodologies
• Experience with Cadence tools is preferred but not essential
• Experience with timing closure and STA
• Exposure to physical verification and signoff
• Scripting experience, ideally with TCL, Python or Shell
• Experience working with mixed signal or analogue blocks would be a strong advantage
• Experience with SerDes is useful but not essential

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/