Physical Design Engineer

Stealth Startup - Deep Tech; Greater London; On-site; GBP 120,000 - 170,000; Full time

Job summary

Stealth Startup is a UK-based deep-tech venture redefining Moore's law with optical logic. The role focuses on architecture design and implementation for the chip, from floor-planning to routing, with an emphasis on timing and synthesis.

You will work closely with EDA partners to optimise CAD flows and learn novel properties of optical logic, while contributing across the design stack in a fast-paced stealth environment.

Qualifications

• Extensive tapeout experience in physical design on sub 10nm CMOS.
• Understanding of the differences between conventional EIC and PIC design.
• Willingness to learn and adapt flows, and best practices to the novel properties of optical logic.
• RTL design experience with modern computer architecture.

Responsibilities

• Floor-planning, placement, CTS, routing.
• Synthesis, timing analysis and optimisation.
• Working with EDA partners for CAD optimisation.

Skills

Tapeout experience

Sub-10nm CMOS

EIC vs PIC

Adaptive flows

RTL design

EDA tools

Tools

EDA tools

Job description

We're a stealth, VC-backed deep-tech startup, redefining Moore's law with digital photonics.

ABOUT THE ROLE

You'll be working together with us on the design and implementation of the architecture and have the ability to meaningfully shape all components of the chip. This work can include:

• Floor-planning, placement, CTS, routing
• Synthesis, timing analysis and optimisation
• Working with EDA partners for CAD optimisation

REQUIRED QUALIFICATIONS

• Extensive tapeout experience in physical design on sub 10nm CMOS
• Understanding of the differences between conventional EIC and PIC design
• Willingness to learn and adapt flows, and best practices to the novel properties of optical logic

OTHER RELEVANT QUALIFICATIONS

• RTL design experience with modern computer architecture