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TRIA is seeking a Senior Silicon Photonics Engineer in the UK to own the wavelength division multiplexing architecture for a high-speed photonic interconnect and compute platform. You will shape the product by defining the wavelength plan, channel spacing and power budget, and drive from spec to silicon.
You will work closely with device, PIC, analogue front-end, layout and packaging engineers to ensure successful tapeouts and robust designs across process and temperature corners.
A UK deep-tech scale-up is building programmable silicon photonic technology that performs compute directly within the data path. That cuts the cost of moving data around and opens up new capability for AI, cybersecurity and scientific workloads. It's a small, highly technical team working on genuinely hard problems, with real silicon at the end of it.
They're hiring a Senior Silicon Photonics Engineer to own the wavelength division multiplexing architecture for their multi-wavelength, high-speed photonic interconnect and compute platform. If the WDM plan is right, everything downstream works, so this is a role that shapes the product.
You'll define the wavelength plan, channel spacing and power budget. You'll then weigh up AWG against micro-ring approaches on power, yield and control complexity. From there, it's simulation across process, wavelength and temperature corners, followed by foundry-ready layouts and test structures.
You'll work closely with device, PIC, analogue front-end, layout and packaging engineers. You'll own foundry signoff for WDM functions and get stuck into first-silicon characterisation and debug.
If you've taped out photonics and would rather set the architecture than inherit it, let's talk.