Lead Digital Verification Engineer - Open-Source Silicon & RISC-V

microTECH Global LTD; Cambridge; Hybrid; GBP 100,000 - 135,000; Full time

Job summary

microTECH Global LTD in Cambridge, UK, is seeking a Senior / Lead Digital Verification Engineer to join a world-class semiconductor team working on OpenTitan Root of Trust and the Ibex RISC-V.

You will lead verification activities for complex IP, develop verification environments with SystemVerilog and UVM, and mentor engineers while shaping verification strategy and security-focused hardware practices.

Qualifications

• Strong industry experience in Digital Design Verification.
• Expert knowledge of SystemVerilog and UVM.
• Experience developing verification environments and methodologies.
• Strong RTL debugging and constrained-random verification experience.
• Understanding of functional coverage and regression testing.
• Programming experience with Python, C, or C++.
• Experience with Git or similar version control tools.
• Experience with RISC-V, CPU, or SoC verification.
• Knowledge of security-focused hardware verification.
• Exposure to formal verification techniques.
• Experience contributing to open-source hardware projects.

Responsibilities

• Lead verification activities for complex digital IP, subsystems, and SoC-level designs.
• Develop and maintain verification environments using SystemVerilog and UVM.
• Define verification strategies, test plans, coverage models, and regression frameworks.
• Debug RTL issues and collaborate closely with design teams.
• Improve verification methodologies, automation, and infrastructure.
• Mentor junior engineers and contribute to technical direction.

Skills

SystemVerilog

UVM

Digital Verification

RTL Debugging

Constrained-random

Regression Testing

Python

C/C++

Git

RISC-V/SoC

Open-source HW

Security HW verification

Formal verification

Tools

SystemVerilog

Job description

microTECH Global LTD in Cambridge, UK, is seeking a Senior / Lead Digital Verification Engineer to join a world-class semiconductor team working on OpenTitan Root of Trust and the Ibex RISC-V.

You will lead verification activities for complex IP, develop verification environments with SystemVerilog and UVM, and mentor engineers while shaping verification strategy and security-focused hardware practices.