UK Verification Engineer — RISC-V & CPU Core Testing

Codasip; Cambridge; On-site; GBP 45,000 - 65,000; Full time

Job summary

Codasip in the UK is seeking Verification Engineers to join our Cambridge or Bristol design centres. You will verify RISC-V processors and extensions, and develop verification solutions including test benches, stimulus, and formal environments.

You’ll work with a multi-disciplinary, international team across the full verification lifecycle. Ideal candidates bring hands-on experience with CPU or IP verification, proficiency in SystemVerilog, Python, C++, or Rust, and a practicalLinux workflow.

Qualifications

• Commercial experience with functional processor verification methodologies as applied to CPU or other ASIC verification (simulators, test generation, coverage collection, gate-level simulation, etc.)
• Knowledge of verifying CPU architectures or other IP
• Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, etc.
• Past verification ownership of a design block
• User knowledge of Linux to enable automation of common tasks
• Knowledge of versioning tools (Git, SVN)
• Knowledge of RISC-V Architecture
• Good knowledge of computer systems and architecture
• Analytical thinking and team collaboration skills
• Ability to work effectively across teams to debug issues and find root causes

Responsibilities

• Verify RISC-V processors and extensions
• Develop verification solutions (e.g., test benches and test bench components, stimulus generation, formal environments)
• Collaborate with other engineers in a team responsible for the delivery of all verification activities related to a component or subsystem from start to finish
• Define verification strategies for blocks and sub-systems, identifying and utilizing the right tools
• Review technical specifications, providing feedback from a verification perspective
• Run simulations, hunt bugs and complete root cause analysis of complex issues
• Define, estimate, prioritise and track your own work
• Track and report verification metrics
• Craft automated verification flows

Skills

SystemVerilog

Python

C++

Rust

Linux

RISC-V

Design ownership

Git

Tools

Git

SV simulators

Linux

SVN

Job description

Codasip in the UK is seeking Verification Engineers to join our Cambridge or Bristol design centres. You will verify RISC-V processors and extensions, and develop verification solutions including test benches, stimulus, and formal environments.

You’ll work with a multi-disciplinary, international team across the full verification lifecycle. Ideal candidates bring hands-on experience with CPU or IP verification, proficiency in SystemVerilog, Python, C++, or Rust, and a practicalLinux workflow.