High-Speed Mixed-Signal RF Test Architect (200+ Gbps)

Semtech; West of England; Hybrid; GBP 90,000 - 130,000; Full time

Job summary

Semtech Bristol Design Centre is seeking a senior test engineering leader to become the technical authority for test development across our mixed-signal and RF portfolio. You will design test strategies for 200Gbps+ SerDes and CDR architectures, from wafer to volume production, and set DFT standards the organisation adopts.

Your background includes Advantest V93000, signal integrity, jitter, and BER analysis, plus experience leading NPI programs and driving continuous improvement in test

Qualifications

• 8+ years of semiconductor test engineering experience, including 4+ years in mixed-signal/RF test development.
• Proven track record leading NPI programs for high-speed ICs.
• Expert level with Advantest V93000 platform (SmarTest 7/8).
• Advanced programming in C/C++, Python, and TCL.
• Strong knowledge of high-speed signal integrity, jitter, and BER testing.
• Experience with RF/microwave test techniques beyond 40GHz.
• Experience with PCB design tools (Cadence, Altium).

Responsibilities

• Architect test strategies for complex mixed-signal / RF products from concept through production maturity.
• Lead development of innovative test methodologies for high-speed SerDes, CDRs, and signal conditioning products.
• Drive DFT/testability requirements into IC architecture, establishing company-wide standards and best practices.
• Develop and implement advanced test techniques for products operating at >200Gbps data rates.
• Create reusable test IP, libraries, and frameworks that accelerate NPI cycles across product families.
• Perform technical risk assessment and mitigation strategies for test coverage and quality.

Skills

Mixed-signal test

RF test techniques

Python

C/C++

TCL

Jitter analysis

BER testing

Signal integrity

DFT techniques

Problem solving

Project leadership

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering or related field

PhD (preferred)

Tools

Advantest V93000 (SmarTest 7/8)

Cadence

Altium

Wafer-level test equipment

Job description

Semtech Bristol Design Centre is seeking a senior test engineering leader to become the technical authority for test development across our mixed-signal and RF portfolio. You will design test strategies for 200Gbps+ SerDes and CDR architectures, from wafer to volume production, and set DFT standards the organisation adopts.

Your background includes Advantest V93000, signal integrity, jitter, and BER analysis, plus experience leading NPI programs and driving continuous improvement in test