Campus FPGA Engineer Intern: Ultra-Low-Latency Trading HW

Amsterdam Quant Society; Greater London; Hybrid; GBP 13,000 - 20,000; Part time

Job summary

Amsterdam Quant Society in London is offering an FPGA internship to build ultra-low-latency hardware for trading, networking, high-performance computing, and real-time acceleration using RTL and low-level systems skills.

The role covers FPGA and systems design for ultra-low-latency trading applications, networking and HPC, with hardware acceleration for trading, machine learning, and other algorithms. International students are encouraged to apply.

Qualifications

• Undergraduate or graduate student in Electrical Engineering, Computer Science, or related field.
• FPGA, hardware or systems-design experience; RTL in SystemVerilog, Verilog or VHDL.
• C, C++, and/or Python proficiency; reliable availability for internship.

Responsibilities

• FPGA and systems design for ultra-low-latency trading applications.
• Networking, high-performance computing, and real-time acceleration.
• Hardware acceleration for trading, machine learning, and other algorithms.

Skills

FPGA design

RTL experience

C/C++/Python

Education

Electrical Engineering/Computer Science

Tools

CocoTB

Chisel

Bluespec

OpenCores

RISC-V

HLS/OpenCL

Job description

Amsterdam Quant Society in London is offering an FPGA internship to build ultra-low-latency hardware for trading, networking, high-performance computing, and real-time acceleration using RTL and low-level systems skills.

The role covers FPGA and systems design for ultra-low-latency trading applications, networking and HPC, with hardware acceleration for trading, machine learning, and other algorithms. International students are encouraged to apply.