Design Verification Engineer

ZipRecruiter; Cambridge; Hybrid; GBP 50,000 - 90,000; Full time

Job summary

An innovative start-up seeks skilled Verification Engineers to ensure the correctness of hardware designs using formal methods. This role offers the chance to work with cutting-edge technologies and contribute to robust system development. With exciting projects underway and partnerships with global leaders, this position is ideal for both junior and senior candidates looking to make a significant impact in the semiconductor field. Join a successful founder and enjoy equity along with a competitive salary, all while working in a dynamic environment that values your expertise and creativity.

Benefits

Equity

Competitive base salary

Qualifications

• Proven experience with formal verification tools and RTL design.
• Hands-on experience with UVM and simulation-based verification techniques.

Responsibilities

• Apply formal methods to verify hardware designs for correctness.
• Ensure systems meet functional specifications and are free of errors.

Skills

Formal Verification

RTL Design (Verilog/SystemVerilog/VHDL)

Verification Methodologies (UVM)

Assertions (SVA)

Education

Bachelor’s degree in Electrical Engineering

Master’s degree in Computer Engineering

Bachelor’s degree in Computer Science

Tools

Cadence JasperGold

Synopsys VC Formal

Job description

Job Description

Verification Engineer - Cambridge (can do remote within the UK)

Senior and Principal Verification Engineers

I am seeking highly skilled and detail-oriented Verification Engineers to join a dynamic start-up. The successful candidate will be responsible for applying formal methods to verify the correctness of hardware designs, ensuring that the systems meet functional specifications and are free of design errors. This position offers an exciting opportunity to work on cutting-edge technologies and contribute to the development of robust and reliable systems. With projects already in full flow and partnerships with some global names, this is a great opportunity for Juniors and Seniors alike to join!

Required Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools).
• Hands-on experience with RTL design such as Verilog, SystemVerilog, or VHDL.
• Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques.
• Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments.

On offer is the chance to join an early stage start-up with a founder who has already had previous success within the Semiconductor space. You will get equity and a competitive base salary. The role is open to Principal and Senior candidates.

You must have UK working rights to be considered for this role.

For more information, please contact Rachel Mason at IC Resources.