CPU Verification Engineer

JR United Kingdom; Cambridge; On-site; GBP 45,000 - 70,000; Full time

Job summary

A leading company in the UK is seeking an experienced Hardware R&D Engineer to develop a new CPU architecture. This role involves defining interfaces between hardware, firmware, and operating systems, working collaboratively with a team of experts to ensure client needs are met. The position is onsite in Cambridge, London, or Edinburgh, requiring a strong background in CPU architecture and programming skills.

Qualifications

• Experience in software development with C programming.
• Understanding of CPU architecture and micro-architecture features.
• Familiarity with ARM/RISC-V/MIPS architectures.

Responsibilities

• Develop a competitive CPU architecture.
• Define interfaces between hardware, firmware, and operating systems.
• Collaborate with experts to meet client requirements.

Skills

C

C++

CPU Architecture

Micro-Architecture

Assembler Programming

Education

Degree in Computer Science

Degree in Electrical Engineering

Tools

ARM

RISC-V

MIPS

AVX

SVE

SME

CCA

Job description

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We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems based on it

You will be working with a wider team of experts, architects, and together you will be looking after client’s interests and requirements, turning them into reality, and bridging the architectural excellence and the user experience.

This opportunity is an onsite working position, with offices in Cambridge, London or Edinburgh.

Key requirements:

• Degree in Computer Science, Electrical Engineering or related discipline.
• Working experience within the software development space, including C programming and knowledge of low level assembler programming languages.
• Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines).
• Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores.
• Strong understanding of modelling microprocessors using higher-level languages like C/C++.
• Prior working experience with one or more following technologies: the Advanced Vector Extensions(AVX), the Scalable Vector Extension(SVE), Scalable Matrix Extension(SME), Confidential Compute Architecture(CCA), Morello/CHERI.

Keywords: CPU / Verification / Arm Architecture / C / C++ / MIPS / Micro-Architecture / Assembly / AVX / SVE / SME / CCA / Hardware / Compiler / Code Optimization / SoC / System-on-Chip / Firmware Development

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